Connecting circuit and communication interface

US12425279B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12425279-B2
Application numberUS-202218551646-A
CountryUS
Kind codeB2
Filing dateMar 25, 2022
Priority dateMar 25, 2021
Publication dateSep 23, 2025
Grant dateSep 23, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An embodiment is a connecting circuit connected to the preceding stage of a transmission circuit and configured to receive a baseband signal, includes an isolation element connected between an input terminal and an output terminal, a signal midpoint detection circuit connected parallel to the isolation element, a bias adding circuit connected in series with the signal midpoint detection circuit, and an initial voltage value detection circuit connected to a frame detection circuit. The initial voltage value detection circuit holds an initial voltage value of the baseband signal in accordance with the signal of the frame detection circuit, and outputs the initial voltage value to the signal midpoint detection circuit. The signal midpoint detection circuit detects a midpoint voltage from the baseband signal and the initial voltage value, and outputs the midpoint voltage to the bias adding circuit. The bias adding circuit adds the midpoint voltage to a bias voltage.

First claim

Opening claim text (preview).

The invention claimed is: 1. A connecting circuit connected to a preceding stage of a transmission circuit and configured to receive a baseband signal, the connecting circuit comprising: an isolation element connected between an input terminal and an output terminal; a signal midpoint detection circuit connected parallel to the isolation element; a bias adding circuit connected in series with the signal midpoint detection circuit; and an initial voltage value detection circuit connected to a frame detection circuit, wherein the initial voltage value detection circuit holds an initial voltage value of the baseband signal in accordance with a signal of the frame detection circuit, and outputs the initial voltage value to the signal midpoint detection circuit, the signal midpoint detection circuit detects a midpoint voltage from the baseband signal and the initial voltage value, and outputs the midpoint voltage to the bias adding circuit, and the bias adding circuit adds the midpoint voltage to a bias voltage for biasing the baseband signal. 2. The connecting circuit according to claim 1 , wherein the initial voltage value detection circuit includes: a signal delay circuit connected to the input terminal; and a sample-and-hold circuit connected to the signal delay circuit, the signal midpoint detection circuit includes: a low-pass filter connected to the input terminal; and a midpoint voltage calculation circuit connected to the low-pass filter, the sample-and-hold circuit holds the initial voltage value of the baseband signal input from the signal delay circuit in accordance with the signal of the frame detection circuit, and outputs the initial voltage value to the midpoint voltage calculation circuit, and the midpoint voltage calculation circuit outputs, to the bias adding circuit, a difference between an output of the low-pass filter and an output of the sample-and-hold circuit. 3. The connecting circuit according to claim 2 , wherein the isolation element includes a plurality of isolation elements, the signal midpoint detection circuit includes a plurality of signal midpoint detection circuits, the bias adding circuit includes a plurality of bias adding circuits, the plurality of signal midpoint detection circuits are respectively connected parallel to the respective plurality of isolation elements, the initial voltage value detection circuit outputs the initial voltage value to the respective plurality of signal midpoint detection circuits, and the respective plurality of signal midpoint detection circuits output the midpoint voltage to the respective plurality of bias adding circuits. 4. A communication interface comprising a connecting circuit defined in claim 2 . 5. The connecting circuit according to claim 1 , wherein the isolation element includes a plurality of isolation elements, the signal midpoint detection circuit includes a plurality of signal midpoint detection circuits, the bias adding circuit includes a plurality of bias adding circuits, the plurality of signal midpoint detection circuits are respectively connected parallel to the respective isolation elements, the initial voltage value detection circuit outputs the initial voltage value to the respective signal midpoint detection circuits, and the respective signal midpoint detection circuits output the midpoint voltage to the respective bias adding circuits. 6. A communication interface comprising a connecting circuit defined in claim 5 . 7. A communication interface comprising a connecting circuit defined in claim 1 . 8. A connecting circuit connected to a preceding stage of a plurality of transmission circuits and configured to receive a plurality of baseband signals, the connecting circuit comprising: a plurality of isolation elements respectively connected between a plurality of input terminals and a plurality of output terminals; a plurality of signal midpoint detection circuits connected parallel to the respective plurality of isolation elements; a plurality of bias adding circuits connected in series with the respective plurality of signal midpoint detection circuits; and an inter-channel interpolation low voltage (VL) detection circuit, wherein the inter-channel interpolation VL detection circuit detects a low-voltage signal among the plurality of baseband signals, and outputs the low-voltage signal to the respective signal midpoint detection circuits, the plurality of signal midpoint detection circuits detect a midpoint voltage from the respective plurality of baseband signals and the low-voltage signal, and output the midpoint voltage to the plurality of bias adding circuits, and the plurality of bias adding circuits add the midpoint voltage to a respective bias voltage for biasing the respective plurality of baseband signals. 9. The connecting circuit according to claim 8 , wherein the inter-channel interpolation VL detection circuit includes a plurality of diode circuits, a resistor, and a voltage source, each of the plurality of baseband signals is input to one end of each of the plurality of diode circuits, the voltage source is connected via the resistor to the other end of each of the plurality of diode circuits, and each of the plurality of diode circuits is connected to make a direction from the one end to the other end to serve as a forward direction. 10. A communication interface comprising a connecting circuit defined in claim 9 . 11. A communication interface comprising a connecting circuit defined in claim 8 . 12. A connecting circuit connected to a preceding stage of a plurality of transmission circuits and configured to receive a plurality of baseband signals, the connecting circuit comprising: a plurality of isolation elements respectively connected between a plurality of input terminals and a plurality of output terminals; a plurality of frame detection circuits connected parallel to the respective plurality of isolation elements; a plurality of switching elements connected in series with the respective plurality of frame detection circuits; a plurality of bias adding circuits connected in series with the respective plurality of switching elements; and a difference average midpoint voltage calculation circuit configured to receive an output of an inter-channel interpolation low voltage (VL) detection circuit and an output of an inter-channel interpolation high voltage (VH) detection circuit, wherein the inter-channel interpolation VL detection circuit detects a low-voltage signal among the plurality of baseband signals, and outputs the low-voltage signal to the difference average midpoint voltage calculation circuit, the inter-channel interpolation VH detection circuit detects a high-voltage signal among the plurality of baseband signals, and outputs the high-voltage signal to the difference average midpoint voltage calculation circuit, the difference average midpoint voltage calculation circuit outputs, to the respective plurality of switching elements, a midpoint voltage based on the output of the inter-channel interpolation VL detection circuit and the output of the inter-channel interpolation VH detection circuit, the plurality of switching elements output the midpoint voltage to the respective plurality of bias adding circuits in accordance with inputs from the respective plurality of frame detection circuits, and the plurality of bias adding circuits add the midpoint voltage to a respective bias voltage for biasing the respective plurality of baseband signals. 13. The connecting circuit according to claim 12 , wherein the inter-channel interpolation VH detection circuit includes a plurality of d

Assignees

Inventors

Classifications

  • Shaping networks in transmitter or receiver, e.g. adaptive shaping networks · CPC title

  • Coupling arrangements; Interface arrangements (interface arrangements for digital computers G06F3/00, G06F13/00) · CPC title

  • H04L25/06Primary

    DC level restoring means; Bias distortion correction {; Decision circuits providing symbol by symbol detection} · CPC title

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What does patent US12425279B2 cover?
An embodiment is a connecting circuit connected to the preceding stage of a transmission circuit and configured to receive a baseband signal, includes an isolation element connected between an input terminal and an output terminal, a signal midpoint detection circuit connected parallel to the isolation element, a bias adding circuit connected in series with the signal midpoint detection circuit…
Who is the assignee on this patent?
Nippon Telegraph & Telephone, Ntt Innovative Devices Corp
What technology area does this patent fall under?
Primary CPC classification H04L25/06. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 23 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).