Amplifier and amplification method

Patent metadata

Field	Value
Publication number	US-12424993-B2
Application number	US-202117799792-A
Country	US
Kind code	B2
Filing date	Jan 21, 2021
Priority date	Mar 6, 2020
Publication date	Sep 23, 2025
Grant date	Sep 23, 2025

Abstract

An amplifier ( 300 ) comprising: a first signal path comprising first amplifier circuitry ( 105 A) configured to receive a first signal (RF1) with a frequency and a variable phase and amplitude at the frequency; a second signal path comprising second amplifier circuitry ( 105 B) configured to receive a second signal (RF2) with the frequency, wherein at least one of the relative phase and amplitude of the second signal is fixed at the frequency; combiner circuitry ( 106 ) configured to combine an output of the first amplifier circuitry and the second amplifier circuitry.

First claim

The invention claimed is:

1. An amplifier comprising:
a first signal path comprising first amplifier circuitry configured to receive a first signal with a frequency and a variable phase and amplitude at the frequency;
a second signal path comprising second amplifier circuitry configured to receive a second signal with the frequency, wherein at least one of a relative phase and amplitude of the second signal is fixed at the frequency;
combiner circuitry configured to combine an output of the first amplifier circuitry and the second amplifier circuitry;
wherein the first and second signals are obtained by splitting a single input signal;
the phase and amplitude of the first signal at the frequency is variable using a complex non-linear drive function;
the phase and amplitude of the first signal is variable at the frequency before splitting the single input signal;
the second signal path has a phase delay to fix the relative phase of the second signal at the frequency; and
the second signal path comprises third amplifier circuitry followed by an amplitude limiter to fix the amplitude of the second signal at the frequency.

2. The amplifier according to claim 1 , wherein the second signal path comprises phase shift circuitry configured to vary the relative phase of the second signal according to variation of the frequency.

3. The amplifier according to claim 2 , wherein the frequency is continuously variable and the relative phase of the second signal is correspondingly continuously variable.

4. The amplifier according to claim 2 , wherein the frequency is one of a plurality of discrete predetermined frequencies and the relative phase of the second signal is correspondingly discretely variable.

5. The amplifier according to claim 1 , wherein the second signal path comprises an amplitude adjuster configured to vary the amplitude of the second signal according to variation of the frequency.

6. The amplifier according to claim 5 , wherein the frequency is continuously variable and the amplitude of the second signal is correspondingly continuously variable.

7. The amplifier according to claim 5 , wherein the frequency is one of a plurality of discrete predetermined frequencies and the amplitude of the second signal is correspondingly discretely variable.

8. The amplifier according to claim 1 , wherein a power level supplied to the second amplifier circuitry is variable according to variation of the frequency.

9. The amplifier according to claim 8 , wherein the frequency is continuously variable and the power level supplied to the second amplifier circuitry is correspondingly continuously variable.

10. The amplifier according to claim 8 , wherein the frequency is one of a plurality of discrete predetermined frequencies and the power level supplied to the second amplifier circuitry is correspondingly discretely variable.

11. The amplifier according to claim 1 , wherein each of the first and second signal paths is a respective one of a carrier amplifier signal path and a peaking amplifier signal path of an inverse Doherty amplifier.

12. A wireless telecommunications base station or terminal device comprising an amplifier according to claim 1 .

13. An amplifier comprising:
a first signal path comprising first amplifier circuitry configured to receive a first signal with a frequency and a variable phase and amplitude at the frequency;
a second signal path comprising second amplifier circuitry configured to receive a second signal with the frequency, wherein at least one of the relative phase and amplitude of the second signal is fixed at the frequency;
combiner circuitry configured to combine an output of the first amplifier circuitry and the second amplifier circuitry
wherein the first and second signals are obtained by splitting a single input signal;
the phase and amplitude of the first signal at the frequency is variable using a complex non-linear drive function
the phase and amplitude of the first signal is variable at the frequency after splitting the single input signal; and
only one of the relative phase and amplitude of the second signal is variable at the frequency after splitting the input signal using a real non-linear drive function.

14. An amplification method comprising:
splitting a single input signal into a first signal path and a second signal path;
receiving, by first amplifier circuitry of the first signal path, a first signal with a frequency and a variable phase and amplitude at the frequency;
using a complex non-linear drive function to vary the phase and amplitude of the first signal at the frequency:
wherein the phase and amplitude of the first signal is variable at the frequency before splitting the single input signal;
receiving, by second amplifier circuitry of the second signal path, a second signal with the frequency, wherein at least one of a relative phase and amplitude of the second signal is fixed at the frequency;
fixing the relative phase of the second signal at the frequency using a phase delay on the second signal path;
fixing the amplitude of the second signal, by third amplifier circuitry followed by an amplitude limiter in the second signal path, at the frequency and
combining an output of the first amplifier circuitry and the second amplifier circuitry.

15. A non-transitory computer readable storage medium having stored thereon code components that, when executed, cause a computer to perform the method according to claim 14 .

Assignees

• Sony Semiconductor Solutions Corp

Inventors

• Mimis Konstantinos

Classifications

• H03F2201/3212

  Using a control circuit to adjust amplitude and phase of a signal in a signal path · CPC title

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title

• H03F3/24

  of transmitter output stages · CPC title

• H03F1/3288

  to compensate phase shift as a function of the amplitude · CPC title

• H03F1/0288 Primary

  using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers · CPC title