Hybrid filters and packages therefor
US-2020287520-A1 · Sep 10, 2020 · US
Multi-layer inductor
US12424541B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12424541-B2 |
| Application number | US-202016832803-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 27, 2020 |
| Priority date | Jun 6, 2019 |
| Publication date | Sep 23, 2025 |
| Grant date | Sep 23, 2025 |
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- Title
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- Abstract
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- Assignees and inventors
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- Key dates
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- First independent claim
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- CPC / IPC classifications
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- Citations and related patents
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Abstract
Official abstract text for this publication.
A device includes a first metal layer including a first terminal outside the first coil and a second terminal within the inner area of the first coil. A second metal layer has a second coil. The second coil has a first terminal outside the second coil and a second terminal within its inner area. A first via electrically couples the second terminals of the first and second coils. A third metal layer has a third coil defining an inner area which at least partially overlaps the inner areas of the first and second coil. The third coil has a first terminal outside the third coil and a second terminal within its inner area. The second coil at least partially overlaps the third coil. A second via electrically couples together the first terminal of the second coil and the second terminal of the third coil.
First claim
Opening claim text (preview).
What is claimed is: 1. A device, comprising: a first metal layer including a first conductive coil defining an inner area, the first conductive coil having a first terminal outside the first conductive coil and a second terminal within the inner area, the first terminal of the first conductive coil for external coupling; a second metal layer having a second conductive coil defining an inner area, the inner area defined by the second conductive coil, which at least partially overlaps the inner area defined by the first conductive coil, the second conductive coil having a first terminal outside the second conductive coil and a second terminal within the inner area defined by the second conductive coil, the first conductive coil at least partially overlapping the second conductive coil; a first via electrically coupling together the second terminals of the first and second conductive coils; a third metal layer having a third conductive coil defining an inner area, the inner area defined by the third conductive coil, which at least partially overlaps the inner areas of the first and second conductive coils, the third conductive coil having a first terminal outside the third conductive coil and a second terminal within the inner area defined by the third conductive coil, the second conductive coil at least partially overlapping the third conductive coil, the first terminal of the third conductive coil for external coupling; and a second via directly coupling together the first terminal of the second conductive coil and the second terminal of the third conductive coil, wherein: the first conductive coil is wound counterclockwise from the first terminal of the first conductive coil to the second terminal of the first conductive coil; the second conductive coil is wound counterclockwise from the second terminal of the second conductive coil to the first terminal of the second conductive coil; and the third conductive coil is wound counterclockwise from the second terminal of the third conductive coil to the first terminal of the third conductive coil. 2. An electronic device formed on a semiconductor substrate, the electronic device comprising: a transistor; and an inductor coupled to the transistor, the inductor comprising: a first metal layer including a first conductive coil defining an inner area, the first conductive coil having a first terminal outside the first conductive coil and a second terminal within the inner area, the first terminal of the first conductive coil for external coupling; a second metal layer having a second conductive coil defining an inner area, the inner area defined by the second conductive coil, which at least partially overlaps the inner area defined by the first conductive coil, the second conductive coil having a first terminal outside the second conductive coil and a second terminal within the inner area defined by the second conductive coil, the first conductive coil at least partially overlapping the second conductive coil; a first via electrically coupling together the second terminals of the first and second conductive coils; a third metal layer having a third conductive coil defining an inner area, the inner area defined by the third conductive coil, which at least partially overlaps the inner areas of the first and second conductive coil, the third conductive coil having a first terminal outside the third conductive coil and a second terminal within the inner area defined by the third conductive coil, the second conductive coil at least partially overlapping the third conductive coil, the first terminal of the third conductive coil for external coupling; and a second via directly coupling together the first terminal of the second conductive coil and the second terminal of the third conductive coil, wherein: the first conductive coil is wound counterclockwise from the first terminal of the first conductive coil to the second terminal of the first conductive coil; the second conductive coil is wound counterclockwise from the second terminal of the second conductive coil to the first terminal of the second conductive coil; and the third conductive coil is wound counterclockwise from the second terminal of the third conductive coil to the first terminal of the third conductive coil.
Assignees
Inventors
Classifications
Layouts of interconnections · CPC title
Vias, e.g. via plugs · CPC title
- H10W20/497Primary
Inductive arrangements or effects of, or between, wiring layers · CPC title
characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs · CPC title
- H10D1/20Primary
Inductors · CPC title
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Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US12424541B2 cover?
- A device includes a first metal layer including a first terminal outside the first coil and a second terminal within the inner area of the first coil. A second metal layer has a second coil. The second coil has a first terminal outside the second coil and a second terminal within its inner area. A first via electrically couples the second terminals of the first and second coils. A third metal l…
- Who is the assignee on this patent?
- Texas Instruments Inc
- What technology area does this patent fall under?
- Primary CPC classification H10W20/497. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Sep 23 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).