Display panel and display device

Patent metadata

Field	Value
Publication number	US-12424153-B2
Application number	US-202418735286-A
Country	US
Kind code	B2
Filing date	Jun 6, 2024
Priority date	May 6, 2021
Publication date	Sep 23, 2025
Grant date	Sep 23, 2025

Abstract

Disclosed are a display panel and a display device. The display panel includes a display area, a plurality of light-emitting elements located in the display area, and at least one driver circuit located in the display area; the plurality of light-emitting elements includes a plurality of light-emitting element rows extend in a first direction and arranged in a second direction, where the first direction and the second direction intersect; the at least one driver circuit includes a plurality of shift register circuits disposed in cascade and a shift register circuit of the plurality of shift register circuits is located between adjacent light-emitting element rows of the plurality of light-emitting element rows.

First claim

What is claimed is:

1. A display panel, comprising a display area;
wherein the display panel further comprises:
a light-emitting element, wherein the light-emitting element is located in the display area;
a pixel circuit, wherein the pixel circuit is located in the display area and the pixel circuit is configured to drive the light-emitting element;
a driver circuit, wherein the driver circuit is located in the display area and the driver circuit is configured to provide a drive signal to the pixel circuit; and
pixel circuit rows, wherein at least one of the pixel circuit rows comprises a plurality of pixel circuits arranged along a first direction, the pixel circuit rows are arranged along a second direction, the first direction and the second direction intersect;
wherein the driver circuit comprises a plurality of stages of shift register circuits cascaded, and at least one stage of shift register circuit is located between adjacent pixel circuit rows;
the display panel comprises a contact electrode, along a direction perpendicular to a base substrate of the display panel, at least one light-emitting element does not overlap with the pixel circuit connected to the at least one light-emitting element, wherein at least one of the following is satisfied:
an electrode of the at least one light-emitting element is electrically connected to the contact electrode through an eutectic layer; or
along a thickness direction of the base substrate, the contact electrode is located between the pixel circuit and the at least one light-emitting element.

2. The display panel of claim 1 , wherein
along the direction perpendicular to the base substrate of the display panel, a position where the contact electrode is bonded to the light-emitting element does not overlap with the pixel circuit.

3. The display panel of claim 1 , wherein
along the direction perpendicular to the base substrate of the display panel, the contact electrode does not overlap with the pixel circuit.

4. The display panel of claim 1 , wherein
at least one light-emitting element is offset along the second direction relative to the pixel circuit connected to the at least one light-emitting element.

5. The display panel of claim 1 , wherein
along the first direction, at least one light-emitting element does not overlap with the pixel circuit connected to the at least one light-emitting element.

6. The display panel of claim 1 , wherein
at an edge area of the display area, at least one light-emitting element is offset along the first direction relative to the pixel circuit connected to the at least one light-emitting element.

7. The display panel of claim 6 , wherein
along the second direction, at least one light-emitting element overlaps with the pixel circuit connected to the at least one light-emitting element.

8. The display panel of claim 1 , wherein
an offset amount of at least one light-emitting element along the second direction relative to the pixel circuit connected to the at least one light-emitting element is greater than an offset amount of at least one light-emitting element along the first direction relative to the pixel circuit connected to the at least one light-emitting element.

9. The display panel of claim 1 , wherein
along a direction perpendicular to the base substrate of the display panel, at least one light-emitting element does not overlap with the driver circuit.

10. The display panel of claim 1 , wherein
along the first direction, at least one light-emitting element does not overlap with either the pixel circuit or the driver circuit.

11. The display panel of claim 1 , wherein
the display panel comprises light-emitting element rows, at least one of the light-emitting element rows comprises a plurality of light-emitting elements arranged along the first direction, and the light-emitting element rows are arranged along the second direction;
an i-th pixel circuit row and an (i+1)-th pixel circuit row are located between an i-th light-emitting element row and an (i+1)-th light-emitting element row.

12. The display panel of claim 11 , wherein
the i-th pixel circuit row is configured to drive the i-th light-emitting element row, and the (i+1)-th pixel circuit row is configured to drive the (i+1)-th light-emitting element row.

13. The display panel of claim 11 , wherein
no shift register circuit is disposed between the i-th pixel circuit row and the (i+1)-th pixel circuit row.

14. The display panel of claim 11 , wherein
the display panel comprises N pixel circuit rows and the N pixel circuit rows are arranged along the second direction;
an (N−1)-th pixel circuit row and an N-th pixel circuit row are located at an edge area of the display area; and
when i=N, no shift register circuit is disposed between the (N−1)-th pixel circuit row and the N-th pixel circuit row.

15. The display panel of claim 1 , wherein
the display panel comprises light-emitting element rows, at least one of the light-emitting element rows comprises a plurality of light-emitting elements arranged along the first direction, and the light-emitting element rows are arranged along the second direction;
the j-th pixel circuit row is disposed on a side of the j-th light-emitting element row away from the (j+1)-th light-emitting element row, and the (j+1)-th pixel circuit row is disposed on a side of the (j+1)-th light-emitting element row facing the j-th light-emitting element row; or
the j-th pixel circuit row is disposed on a side of the j-th light-emitting element row facing the (j+1)-th light-emitting element row, and the (j+1)-th pixel circuit row is disposed on a side of the (j+1)-th light-emitting element row away from the j-th light-emitting element row.

16. The display panel of claim 15 , wherein
the j-th pixel circuit row is configured to drive the j-th light-emitting element row, and the (j+1)-th pixel circuit row is configured to drive the (j+1)-th light-emitting element row.

17. The display panel of claim 15 , wherein
at least one shift register circuit is disposed between the j-th pixel circuit row and the (j+1)-th pixel circuit row.

18. The display panel of claim 15 , wherein
the display panel comprises N pixel circuit rows and the N pixel circuit rows are arranged along the second direction;
an (N−1)-th pixel circuit row and an N-th pixel circuit row are located at an edge area of the display area; and
when j=N, a shift register circuit is disposed between the (N−1)-th pixel circuit row and the N-th pixel circuit row.

19. The display panel of claim 1 , wherein
the display panel comprises light-emitting element rows, at least one of the light-emitting element rows comprises a plurality of light-emitting elements arranged along the first direction, and the light-emitting element rows are arranged along the second direction;
the i-th pixel circuit row and the (i+1)-th pixel circuit row are located between an i-th light-emitting element row and an (i+1)-th light-emitting element row; and
the j-th pixel circuit row is disposed on a side of the j-th light-emitting element row away from the (j+1)-th light-emitting element row, and the (j+1)-th pixel circuit row is disposed on a side of the (j+1)-th light-emitting element row facing the j-th light-emitting element row; or the j-th pixel circuit row is disposed on a side of the j-th light-emitting element row facing the (j+1)-th light-emitting element row, and the (j+1)-th pixel circuit row is disposed on a side of the (j+1)-th light-emitting element row away from the j-th light-emitting

Assignees

• Hubei Yangtze Ind Innovation Center Of Advanced Display Co Ltd

Inventors

• Dai Wenjun
• Xing Liang
• Wu Tianyi

Classifications

• G02F1/136204

  Arrangements to prevent high voltage or static electricity failures · CPC title

• G09G2300/0426

  Layout of electrodes and connections · CPC title

• G09G2300/0408

  Integration of the drivers onto the display substrate · CPC title

• G09G2310/0291

  Details of output amplifiers or buffers arranged for use in a driving circuit · CPC title

• G09G2310/0286

  Details of a shift registers arranged for use in a driving circuit · CPC title