Display panel and display device

Patent metadata

Field	Value
Publication number	US-12422719-B2
Application number	US-202218557486-A
Country	US
Kind code	B2
Filing date	Dec 16, 2022
Priority date	Dec 16, 2022
Publication date	Sep 23, 2025
Grant date	Sep 23, 2025

Abstract

The present disclosure provides a display panel and a display device. The display panel includes: a substrate, a common electrode line, a gate line, a first insulating layer, a data line, a second insulating layer, a pixel electrode layer, a first orientation layer, a liquid crystal layer, a second orientation layer, and a common electrode layer; wherein an angle between an extending direction of the common electrode line and a rubbing direction of the first orientation layer ranges from 0 degrees to 30 degrees or from 60 degrees to 90 degrees, and an angle between an extending direction of the gate line and the rubbing direction of the first orientation layer ranges from 0 degrees to 30 degrees or from 60 degrees to 90 degrees.

First claim

What is claimed is:

1. A display panel, comprising:
a substrate;
a common electrode line and a gate line on the substrate, wherein the common electrode line is isolated from the gate line;
a first insulating layer covering the common electrode line and the gate line;
a data line on a side of the first insulating layer away from the substrate;
a second insulating layer covering the data line;
a pixel electrode layer on a side of the second insulating layer away from the substrate;
a first orientation layer on a side of the pixel electrode layer away from the substrate;
a liquid crystal layer on a side of the first orientation layer away from the substrate;
a second orientation layer on a side of the liquid crystal layer away from the substrate; and
a common electrode layer on a side of the second orientation layer away from the substrate, wherein the common electrode layer is electrically connected to the common electrode line;
wherein an angle between an extending direction of the common electrode line and a rubbing direction of the first orientation layer ranges from 0 degrees to 30 degrees or from 60 degrees to 90 degrees, and an angle between an extending direction of the gate line and the rubbing direction of the first orientation layer ranges from 0 degrees to 30 degrees or from 60 degrees to 90 degrees;
wherein the pixel electrode layer comprises a plurality of sub-pixel electrodes arranged in an array; and
the common electrode line comprises a plurality of groups of sub-common electrode lines, the plurality of groups of sub-common electrode lines being arranged in one-to-one correspondence with the plurality of sub-pixel electrodes in a same row, and each group of the plurality of groups of sub-common electrode lines comprising a first sub-common electrode line and a second sub-common electrode line electrically connected to the first sub-common electrode line, wherein an angle between an extending direction of the first sub-common electrode line and the rubbing direction of the first orientation layer ranges from 60 degrees to 90 degrees, and an angle between an extending direction of the second sub-common electrode line and the rubbing direction of the first orientation layer ranges from 0 degrees to 30 degrees.

2. The display panel according to claim 1 , wherein:
the gate line comprises a plurality of groups of sub-gate lines, the plurality of groups of sub-gate lines being arranged in one-to-one correspondence with the plurality of sub-pixel electrodes in a same row, and each group of the plurality of groups of sub-gate lines comprising a first sub-gate line and a second sub-gate line electrically connected to the first sub-gate line, wherein an angle between an extending direction of the first sub-gate line and the rubbing direction of the first orientation layer ranges from 0 degrees to 30 degrees, and an angle between an extending direction of the second sub-gate line and the rubbing direction of the first orientation layer ranges from 60 degrees to 90 degrees.

3. The display panel according to claim 2 , wherein each of the plurality of sub-pixel electrodes comprises a first edge, a second edge adjacent to the first edge, a third edge opposite to the first edge and a fourth edge opposite to the second edge, wherein the extending direction of the first sub-common electrode line is the same as an extending direction of the first edge, the extending direction of the second sub-common electrode line is the same as an extending direction of the second edge, the extending direction of the first sub-gate line is the same as an extending direction of the fourth edge, and the extending direction of the second sub-gate line is the same as an extending direction of the third edge.

4. The display panel according to claim 1 , wherein:
an orthographic projection of the first sub-common electrode line on the substrate does not overlap with an orthographic projection of a sub-pixel electrode corresponding to the first sub-common electrode line on the substrate; and
an orthographic projection of the second sub-common electrode line on the substrate at least partially overlaps with an orthographic projection of a sub-pixel electrode corresponding to the second sub-common electrode line on the substrate.

5. The display panel according to claim 2 , wherein:
an orthographic projection of the first sub-gate line on the substrate does not overlap with an orthographic projection of a sub-pixel electrode corresponding to the first sub-gate line on the substrate; and
an orthographic projection of the second sub-gate line on the substrate at least partially overlaps with an orthographic projection of a sub-pixel electrode corresponding to the second sub-gate line on the substrate.

6. The display panel according to claim 1 , wherein the each group of the plurality of groups of sub-common electrode lines further comprises a first connection portion connected between the first sub-common electrode line and the second sub-common electrode line.

7. The display panel according to claim 2 , wherein the each group of the plurality of groups of sub-gate lines further comprises a second connection portion connected between the first sub-gate line and the second sub-gate line.

8. The display panel according to claim 1 , wherein:
the extending direction of the common electrode line is substantially parallel or perpendicular to the rubbing direction of the first orientation layer, and the extending direction of the gate line is substantially parallel or perpendicular to the rubbing direction of the first orientation layer.

9. The display panel according to claim 1 , wherein a shape of each of the plurality of sub-pixel electrodes is a parallelogram.

10. The display panel according to claim 9 , wherein the shape of the each of the plurality of sub-pixel electrodes is a rhombus.

11. The display panel according to claim 3 , wherein:
the data line comprises a plurality of groups of sub-data lines, the plurality of groups of sub-data lines being arranged in one-to-one correspondence with the plurality of sub-pixel electrodes in a same column, and each group of the plurality of groups of sub-data lines comprising a first sub-data line and a second sub-data line electrically connected to the first sub-data line, wherein an extending direction of the first sub-data line is the same as an extending direction of the second edge, and an extending direction of the second sub-data line is the same as an extending direction of the third edge.

12. The display panel according to claim 11 , wherein:
an orthographic projection of the data line on the substrate does not overlap with an orthographic projection of a sub-pixel electrode corresponding to the data line on the substrate; or
the each group of the plurality of groups of sub-data lines further comprises a third connection portion connected between the first sub-data line and the second sub-data line.

13. The display panel according to claim 11 , wherein:
an orthographic projection of the first sub-data line on the substrate at least partially overlaps with an orthographic projection of an adjacent sub-pixel electrode on the substrate, wherein the adjacent sub-pixel electrode is a sub-pixel electrode adjacent to the second edge of the sub-pixel electrode corresponding to the data line; and
an orthographic projection of the second sub-data line on the substrate at least partially overlaps with an orthographic projection of another adjacent sub-pixel electrode on the substrate, wherein the another adjacent sub-pixel electrode is a sub-pixel electrode adjacent to the third edge of the sub-pixel electrode corresponding to the

Assignees

• Beijing Boe Optoelectronics Tech Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Wang Ce
• Hao Longhu
• Bi Yao
• Zhong Xuan
• Li Ning
• Bi Hongsheng
• Song Bangjun

Classifications

• G02F1/1368

  in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title

• G02F1/134309

  characterised by their geometrical arrangement · CPC title

• G02F1/1337

  Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers · CPC title

• G02F1/133345 Primary

  Insulating layers (G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence) · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title