Guaranteed data compression

US12418657B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12418657-B2
Application numberUS-202418671950-A
CountryUS
Kind codeB2
Filing dateMay 22, 2024
Priority dateJun 29, 2018
Publication dateSep 16, 2025
Grant dateSep 16, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

A method of converting 10-bit pixel data (e.g. 10:10:10:2 data) into 8-bit pixel data involves converting the 10-bit values to 7-bits or 8-bits and generating error values for each of the converted values. Two of the 8-bit output channels comprise a combination of a converted 7-bit value and one of the bits from the fourth input channel. A third 8-bit output channel comprises the converted 8-bit value and the fourth 8-bit output channel comprises the error values. In various examples, the bits of the error values may be interleaved when they are packed into the fourth output channel.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of converting 10-bit format pixel data into 8-bit format data, the method comprising, for a pixel: generating an error value for a 10-bit input data channel by comparing a first number of least significant bits (LSBs) of the input data channel and a same first number of bits derived from a truncated version of the channel; and outputting an 8-bit channel comprising the error value. 2. The method according to claim 1 , wherein the truncated version of the channel comprises 7 bits. 3. The method according to claim 1 , wherein generating an error value for the 10-bit input data channel by comparing a first number of LSBs of the input data channel and a same first number of bits derived from the truncated version of the channel comprises: generating an error value for the 10-bit input data channel by combining using an XOR logic block three LSBs of the input data channel and three bits derived from the truncated version of the channel. 4. The method according to claim 1 , wherein the first number of bits derived from the truncated version of the channel comprises the three most significant bits (MSBs) of the truncated version of the channel. 5. The method according to claim 1 , further comprising: prior to generating the error values, expanding, using bit replication, the truncated version of the channels to 10 bits; and wherein the first number of bits derived from the truncated version of the channel comprises the three LSBs of the expanded truncated version of the channel. 6. The method according to claim 1 , wherein the truncated version of the channel is encoded using Gray coding. 7. The method according to claim 1 , further comprising outputting an 8-bit channel comprising the truncated version of the channel with a different appended bit from a further input data channel appended as an MSB. 8. The method according to claim 1 , wherein the 10-bit pixel data comprises RGBA pixel data. 9. A method of compressing 10-bit format pixel data comprising: converting 10-bit format pixel data into 8-bit format data using the method as set forth in claim 1 ; and compressing a block of 8-bit format data using a lossless compression method to generate a first compressed data block. 10. The method according to claim 9 , further comprising: assessing the first compressed data block against a target compression threshold; in response to determining that the first compressed data block satisfies the target compression threshold, outputting the first compressed data block; and in response to determining that the first compressed data block does not satisfy the target compression threshold, discarding one or more bits from the 8-bit channel comprising the error values in the block of 8-bit format data to generate a reduced size block of data and compressing the reduced size block of data using the lossless compression method to generate a second compressed data block, wherein the second compressed data block is smaller than the first compressed data block. 11. The method according to claim 10 , further comprising: outputting the second compressed data block. 12. The method according to claim 10 , further comprising: assessing the second compressed data block against the target compression threshold; in response to determining that the second compressed data block satisfies the target compression threshold, outputting the second compressed data block; and in response to determining that the second compressed data block does not satisfy the target compression threshold, outputting, instead of the second compressed data block, a third compressed data block generated from the block of 8-bit format data, wherein the third compressed data block is generated using a lossy compression technique, and wherein the lossy compression technique is arranged to ensure that the third compressed data block satisfies the target compression threshold. 13. A method of converting 8-bit format pixel data into 10-bit format data, the method comprising: using bit replication to increase an input data channel to a 10-bit channel; and for the channel, modifying a first number of least significant bits (LSBs) by combining them with corresponding bits from an 8-bit channel to generate a corresponding 10-bit output channel. 14. The method according to claim 13 , further comprising: Gray decoding the 2-bit last output channel. 15. A data decompression unit arranged to convert 8-bit format pixel data into 10-bit format data, the hardware comprising: bit replication logic arranged, for a pixel, to use bit replication to increase an input data channel to a 10-bit channel; and hardware logic arranged, for the channel, to modify a first number of least significant bits (LSBs) by combining them with corresponding bits from an 8-bit channel to generate a corresponding 10-bit output channel. 16. The data decompression unit of claim 15 , wherein the data compression unit is embodied in hardware on an integrated circuit. 17. A non-transitory computer readable storage medium having stored thereon computer executable code that when executed causes at least one processor to perform the method as set forth in claim 1 . 18. A non-transitory computer readable storage medium having stored thereon a computer readable dataset description of an integrated circuit that, when processed in an integrated circuit manufacturing system, causes the integrated circuit manufacturing system to manufacture a data decompression unit as set forth in claim 15 . 19. An integrated circuit manufacturing system comprising: a computer readable storage medium having stored thereon a non-transitory computer readable dataset description of an integrated circuit that describes a data decompression unit as set forth in claim 15 ; a layout processing system configured to process the integrated circuit description so as to generate a circuit layout description of an integrated circuit embodying the data compression unit; and an integrated circuit generation system configured to manufacture the data compression unit according to the circuit layout description.

Assignees

Inventors

Classifications

  • Processor architectures; Processor configuration, e.g. pipelining · CPC title

  • involving methods or arrangements for detection of transmission errors at the decoder · CPC title

  • H04N19/42Primary

    characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation (H04N19/635 takes precedence) · CPC title

  • the region being a block, e.g. a macroblock · CPC title

  • for controlling the amplitude of colour signals, e.g. automatic chroma control circuits (H04N9/71, H04N9/73 take precedence; camera processing pipelines for controlling the colour saturation of colour signals H04N23/86) · CPC title

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What does patent US12418657B2 cover?
A method of converting 10-bit pixel data (e.g. 10:10:10:2 data) into 8-bit pixel data involves converting the 10-bit values to 7-bits or 8-bits and generating error values for each of the converted values. Two of the 8-bit output channels comprise a combination of a converted 7-bit value and one of the bits from the fourth input channel. A third 8-bit output channel comprises the converted 8-bi…
Who is the assignee on this patent?
Imagination Tech Ltd
What technology area does this patent fall under?
Primary CPC classification H04N19/42. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 16 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).