Electronic device controlling pulse signal from processor to display

Patent metadata

Field	Value
Publication number	US-12417724-B2
Application number	US-202318488294-A
Country	US
Kind code	B2
Filing date	Oct 17, 2023
Priority date	Sep 30, 2022
Publication date	Sep 16, 2025
Grant date	Sep 16, 2025

Abstract

An electronic device is provided. The electronic device includes a processor. The electronic device includes a display including a display driver circuit and a display panel. The electronic device includes a first path connecting the display driver circuit to the processor. The electronic device includes a second path connecting the display driver circuit to the processor and separate from the first path. The processor is configured to transmit, based on a first cycle, via the second path to the display driver circuit, a pulse signal to synchronize, with a first time period in the processor used to display an image transmitted via the first path to the display driver circuit on the display panel, the first time period in the display driver circuit used to display the image on the display panel. The processor is configured to change, based on a second cycle different from the first cycle, a waveform of the pulse signal transmitted from the first cycle from a first waveform to a second waveform to synchronize, with a second time period in the processor used for the display of the image, the second time period in the display driver circuit used for the display of the image.

First claim

What is claimed is:

1. An electronic device comprising:
at least one processor comprising processing circuitry;
memory comprising one or more storage media storing instructions;
a display including display driver circuitry and a display panel;
a first path, connecting the display driver circuitry to the at least one processor, configured to transmit an image from the at least one processor to the display driver circuitry; and
a second path, connecting the display driver circuitry to the at least one processor, separated from the first path,
wherein the instructions, when executed by the at least one processor individually or collectively, cause the electronic device to:
periodically transmit, via the second path, from the at least one processor to the display driver circuitry, a pulse signal to synchronize counting of the at least one processor performed for displaying an image on the display panel with counting of the display driver circuitry performed for displaying an image on the display panel;
in response to a start timing of a first synchronization signal for the at least one processor being identified as not overlapping a start timing of a second synchronization signal for the at least one processor in accordance with the counting of the at least one processor, set a waveform of the pulse signal periodically transmitted as a first waveform; and
in response to a start timing of the first synchronization signal for the at least one processor being identified as overlapping a start timing of the second synchronization signal for the at least one processor in accordance with the counting of the at least one processor, set the waveform of the pulse signal periodically transmitted as a second waveform different from the first waveform, and
wherein a cycle of the first synchronization signal for the at least one processor is shorter than a cycle of the second synchronization signal for the at least one processor.

2. The electronic device of claim 1 , wherein the first path is configured to be disabled in at least portion of a time period that ceases to transmit an image from the at least one processor to the display driver circuitry, and
wherein the instructions, when executed by the at least one processor individually or collectively, cause the electronic device to
maintain, while the first path is disabled, the pulse signal periodically transmitted via the second path from the at least one processor to the display driver circuitry.

3. The electronic device of claim 1 , wherein the display driver circuitry includes a graphic random access memory (GRAM),
wherein the first path is configured to be disabled in at least portion of a time period that executes displaying on the display panel by scanning, by the display driver circuitry, an image stored in the GRAM, and
wherein the instructions, when executed by the at least one processor individually or collectively, cause the electronic device to maintain, while the first path is disabled, the pulse signal periodically transmitted via the second path from the at least one processor to the display driver circuitry.

4. The electronic device of claim 1 , wherein the display driver circuitry is configured to:
based on the waveform of the pulse signal periodically transmitted from the at least one processor to the display driver circuitry being identified as the first waveform, synchronize the first synchronization signal for the display driver circuitry with the first synchronization signal for the at least one processor; and
based on the waveform of the pulse signal periodically transmitted from the at least one processor to the display driver circuitry being identified as the second waveform, synchronize the second synchronization signal for the display driver circuitry with the second synchronization signal for the at least one processor.

5. The electronic device of claim 1 , wherein the first synchronization signal for the at least one processor comprises a horizontal synchronization signal for the at least one processor, and
wherein the second synchronization signal for the at least one processor comprises a vertical synchronization signal for the at least one processor.

6. The electronic device of claim 1 , wherein the first synchronization signal for the at least one processor comprises a horizontal synchronization signal for the at least one processor, and
wherein the second synchronization signal for the at least one processor comprises an emission synchronization signal for the at least one processor indicating a transmission timing of an emission signal from the display driver circuitry to the display panel.

7. The electronic device of claim 1 , wherein the instructions, when executed by the at least one processor individually or collectively, cause the electronic device to:
set the waveform of the pulse signal periodically transmitted as the first waveform by setting a width of the pulse signal as a first width; and
set the waveform of the pulse signal periodically transmitted as the second waveform by setting the width of the pulse signal as a second width different from the first width.

8. The electronic device of claim 1 ,
wherein a transmission cycle of the pulse signal periodically transmitted corresponds to the cycle of the first synchronization signal for the at least one processor.

9. The electronic device of claim 1 , wherein the instructions, when executed by the at least one processor individually or collectively, cause the electronic device to:
identify a control command to be provided to the display driver circuitry with respect to displaying an image on the display panel; and
based on the identification, provide the control command to the display driver circuitry by setting the waveform of the pulse signal periodically transmitted as a third waveform different from the first waveform and the second waveform.

10. The electronic device of claim 9 , wherein the display driver circuit includes a graphic random access memory (GRAM), and
wherein the control command comprises a control command indicating to store an image in the GRAM and/or a control command indicating to change a refresh rate of an image to be displayed on the display panel.

11. An electronic device comprising:
at least one processor comprising processing circuitry;
a display including display driver circuitry and a display panel;
a first path, connecting the display driver circuitry to the at least one processor, configured to transmit an image from the at least one processor to the display driver circuitry; and
a second path, connecting the display driver circuitry to the at least one processor, separated from the first path,
wherein the instructions, when executed by the at least one processor individually or collectively, cause the electronic device to:
periodically transmit, via the second path, from the at least one processor to the display driver circuitry, a pulse signal to synchronize counting of the at least one processor performed for displaying an image on the display panel; with counting of the display driver circuitry performed for displaying an image on the display panel;
identify a control command to be provided to the display driver circuit with respect to the display of the image on the display panel;
based on the identification, provide the control command to the display driver circuitry by changing a waveform of the pulse signal periodically transmitted from a first waveform to a second waveform different from the first waveform;
based on providing the control command to the display driver circuitry, restore the waveform of the pulse signal periodically transmitted to the first waveform.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Lee Jaesung
• Kwon Kyounghwan
• Bae Jongkon
• Kim Donghwy
• Yang Byungduk

Classifications

• G09G2340/0435

  Change or adaptation of the frame rate of the video stream · CPC title

• G09G2230/00

  Details of flat display driving waveforms · CPC title

• G09G2330/021

  Power management, e.g. power saving · CPC title

• G09G2310/0264

  Details of driving circuits · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title