System and method for communication between a commander device and a responder device
US-12066962-B2 · Aug 20, 2024 · US
US12417200B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12417200-B2 |
| Application number | US-202418764940-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 5, 2024 |
| Priority date | Mar 26, 2018 |
| Publication date | Sep 16, 2025 |
| Grant date | Sep 16, 2025 |
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A device includes a master device, a set of slave devices and a bus. The master device is configured to transmit first messages carrying a set of operation data message portions indicative of operations for implementation by slave devices of the set of slave devices, and second messages addressed to slave devices in the set of slave devices. The second messages convey identifiers identifying respective ones of the slave devices to which the second messages are addressed requesting respective reactions towards the master device within respective expected reaction intervals. The slave devices are configured to receive the first messages transmitted from the master device, read respective operation data message portions in the set of operation data message portions, implement respective operations as a function of the respective operation data message portions read, and receive the second messages transmitted from the master device.
Opening claim text (preview).
What is claimed is: 1. A method, comprising: encoding, by a commander device, messages in a CAN FD format using a serial peripheral interface (SPI) protocol to form encoded messages, wherein each encoded message comprises a CRC field and a CRC delimiter following the CRC field; and transmitting, by the commander device, first messages of the encoded messages addressed to responder devices in a set of responder devices, the first messages comprising identifiers identifying respective ones of the responder devices to which the first messages are addressed. 2. The method of claim 1 , wherein the CRC delimiter comprises a recessive bit. 3. The method of claim 1 , wherein each first message further comprises a memory address, data bytes and a write request according to the SPI protocol. 4. The method of claim 1 , wherein each first message further comprises a memory address, data bytes and a read request according to the SPI protocol. 5. The method of claim 1 , wherein: the encoding and the transmitting are performed by a protocol controller of the commander device; and the transmitting comprises transmitting the first messages to the responder devices via a bus. 6. A method, comprising: receiving, by a responder device of a set of responder devices, messages from a commander device conveying identifiers identifying the responder device as the one of the responder devices to which the messages are addressed, wherein the messages are encoded in a CAN FD format using a serial peripheral interface (SPI) protocol, and each message of the messages comprises a CRC field and a CRC delimiter following the CRC field; and verifying, by the responder device, a correctness of the CRC field and a presence of the CRC delimiter. 7. The method of claim 6 , further comprising switching, by the responder device, to a fail-safe state as a result of expiration of a respective watchdog timer. 8. The method of claim 7 , further comprising resetting, by the responder device, the respective watchdog timer as a result of the messages received from the commander device. 9. The method of claim 6 , wherein the responder device is a light-radiation source driver. 10. The method of claim 9 , wherein the responder device is a vehicle light driver. 11. The method of claim 6 , wherein the CRC delimiter comprises a recessive bit. 12. The method of claim 6 , wherein: each message of the messages further comprises a memory address, data bytes and a write request according to the SPI protocol; and the method further comprises writing, by the responder device, the data bytes in a memory in response to receiving the memory address, the data bytes and the write request. 13. The method of claim 6 , wherein each message of the messages further comprises a memory address, data bytes and a read request according to the SPI protocol. 14. The method of claim 6 , wherein: the receiving and the verifying are performed by a communication and protocol controller circuit of the responder device; and the receiving comprises receiving the messages from the commander device via a bus. 15. A non-transitory computer readable medium with instructions stored thereon, wherein the instructions, when executed by a processor of a responder device in a set of responder devices, enable the processor to perform the steps of: receiving messages from a commander device conveying identifiers identifying the responder device as the one of the responder devices to which the messages are addressed, wherein the messages are encoded in a CAN FD format using a serial peripheral interface (SPI) protocol, and each message of the messages comprises a CRC field and a CRC delimiter following the CRC field; and verifying a correctness of the CRC field and a presence of the CRC delimiter. 16. The non-transitory computer readable medium of claim 15 , wherein the instructions, when executed by the processor, further enable the processor to perform the step of switching to a fail-safe state as a result of expiration of a respective watchdog timer. 17. The non-transitory computer readable medium of claim 16 , wherein the instructions, when executed by the processor, further enable the processor to perform the step of resetting the respective watchdog timer as a result of the messages received from the commander device. 18. The non-transitory computer readable medium of claim 15 , wherein the CRC delimiter comprises a recessive bit. 19. The non-transitory computer readable medium of claim 15 , wherein: each message of the messages further comprises a memory address, data bytes and a write request according to the SPI protocol; and the instructions, when executed by the processor, further enable the processor to perform the step of writing the data bytes in a memory in response to receiving the memory address, the data bytes and the write request. 20. The non-transitory computer readable medium of claim 15 , wherein each message of the messages further comprises a memory address, data bytes and a read request according to the SPI protocol.
on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title
Details regarding a bus controller · CPC title
to protect a block of data words, e.g. CRC or checksum (G06F11/1076 takes precedence; security arrangements for protecting computers or computer systems against unauthorized activity G06F21/00) · CPC title
Controller Area Network CAN · CPC title
Bus configuration (home automation networks H04L12/2803; arrangements for maintenance or administration H04L41/00) · CPC title
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