Semiconductor device

Patent metadata

Field	Value
Publication number	US-12414358-B2
Application number	US-202217862483-A
Country	US
Kind code	B2
Filing date	Jul 12, 2022
Priority date	Jul 14, 2021
Publication date	Sep 9, 2025
Grant date	Sep 9, 2025

Abstract

A semiconductor device includes a main element and a sense element. Each of the main element and the sense element includes a drift layer, a base layer, an emitter region, a gate insulation film, a gate electrode, and a rear surface layer. The base layer is on the drift layer. The emitter region is at a surface layer portion of the base layer. The gate insulation film is disposed at a surface of the base layer between the emitter region and the drift layer. The gate electrode is on the gate insulation film. The rear surface layer faces the base layer with the drift layer between the rear surface layer and the base layer. The rear surface layer in the main element includes a collector layer. The rear surface layer in the sense element includes a low-impurity layer having smaller amount of impurities than the collector layer.

First claim

What is claimed is:

1. A semiconductor device comprising:
a main element disposed at a main region, the main element configured to allow a main current to flow through the main element; and
a sense element disposed at a sense region, the sense element configured to allow a sense current to flow through the sense element,
wherein the main current flowing through the main element is detected based on the sense current flowing through the sense element,
wherein each of the main element and the sense element includes:
a drift layer of a first conductivity type;
a base layer of a second conductivity type disposed on the drift layer;
an emitter region of the first conductivity type disposed at a surface layer portion of the base layer, the emitter region having higher impurity concentration than the drift layer;
a gate insulation film disposed at a surface of the base layer interposed between the emitter region and the drift layer;
a gate electrode disposed on the gate insulation film;
a rear surface layer disposed at a side facing the base layer with the drift layer interposed between the rear surface layer and the base layer;
a first electrode electrically connected to the emitter region and the base layer; and
a second electrode electrically connected to the rear surface layer,

wherein the rear surface layer in the main element includes a collector layer of the second conductivity type, and
wherein the rear surface layer in the sense element includes a low-impurity layer of the second conductivity type having lower amount of impurities than the collector layer of the rear surface in the main element along a stacking direction of the drift layer and the base layer.

2. The semiconductor device according to claim 1 ,
wherein the sense element includes a first sense element portion and a second sense element portion,
wherein the first sense element portion is different from the second sense element portion in a structure of the low-impurity layer, and
wherein the first sense element portion and the second sense element portion are connected in parallel to the main element.

3. The semiconductor device according to claim 1 ,
wherein the main region includes:
an insulated gate bipolar transistor region having an insulated gate bipolar transistor element with the collector layer; and
a freewheeling diode region having a freewheeling diode element with a cathode layer of the first conductivity type included in the rear surface layer,

wherein the low-impurity layer includes a reverse conductivity-type layer of the first conductivity type, and
wherein the reverse conductivity-type layer has a thickness identical to the cathode layer, and has impurity concentration identical to the cathode layer.

4. The semiconductor device according to claim 1 ,
wherein the low-impurity layer includes a low-impurity-concentration layer of the second conductivity type having lower peak impurity concentration than the collector layer.

5. A semiconductor device comprising:
a main element disposed at a main region, the main element configured to allow a main current to flow through the main element; and
a sense element disposed at a sense region, the sense element configured to allow a sense current to flow through the sense element,
wherein the main current flowing through the main element is detected based on the sense current flowing through the sense element,
wherein each of the main element and the sense element includes:
a drift layer of a first conductivity type;
a base layer of a second conductivity type disposed on the drift layer;
an emitter region of the first conductivity type disposed at a surface layer portion of the base layer, the emitter region having higher impurity concentration than the drift layer;
a gate insulation film disposed at a surface of the base layer interposed between the emitter region and the drift layer;
a gate electrode disposed on the gate insulation film;
a rear surface layer disposed at a side facing the base layer with the drift layer interposed between the rear surface layer and the base layer;
a first electrode electrically connected to the emitter region and the base layer; and
a second electrode electrically connected to the rear surface layer, and

wherein the rear surface layer in the sense element has lower amount of impurities of a second conductivity type than the rear surface layer in the main element along a stacking direction of the drift layer and the base layer.

Assignees

• Denso Corp

Inventors

• Sugiura Hiroto
• Sumitomo Masakiyo

Classifications

• H10D62/393

  Body regions of DMOS transistors or IGBTs  (cell layout of DMOS H10D62/127) · CPC title

• H10D12/481

  having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs · CPC title

• H10D8/422 Primary

  PN diodes having the PN junctions in mesas · CPC title

• H10D64/117

  Recessed field plates, e.g. trench field plates or buried field plates · CPC title

• H10D62/142

  Anode regions of thyristors or collector regions of gated bipolar-mode devices · CPC title