Manufacturing method of semiconductor device

Patent metadata

Field	Value
Publication number	US-12414346-B2
Application number	US-202217964276-A
Country	US
Kind code	B2
Filing date	Oct 12, 2022
Priority date	Nov 5, 2021
Publication date	Sep 9, 2025
Grant date	Sep 9, 2025

Abstract

A manufacturing method of a semiconductor device includes a step of preparing a semiconductor substrate having a first main surface and a second main surface, a step of forming a recess in the first main surface and embedding an insulating film in the recess, a step of forming a polysilicon film on the insulating film, a step of forming an interlayer insulating film on the first main surface so as to cover the insulating film and the polysilicon film, and a step of forming a first contact hole and a second contact hole. The semiconductor substrate has a first impurity diffusion region formed in the first main surface, and a second impurity diffusion region in contact with a portion of the first impurity diffusion region, the portion being closer to the second main surface.

First claim

What is claimed is:

1. A manufacturing method of a semiconductor device comprising the steps of:
preparing a semiconductor substrate having a first main surface and a second main surface;
forming a recess in the first main surface and embedding an insulating film in the recess;
forming a polysilicon film on the insulating film;
forming an interlayer insulating film on the first main surface so as to cover the insulating film and the polysilicon film; and
forming a first contact hole and a second contact hole,
wherein the semiconductor substrate has a first impurity diffusion region formed in the first main surface, and a second impurity diffusion region in contact with a portion of the first impurity diffusion region, the portion being closer to the second main surface,
the first contact hole is formed so as to penetrate the interlayer insulating film and to expose the second impurity diffusion region from the first contact hole,
the second contact hole is formed so as to penetrate the interlayer insulating film and to expose the polysilicon film from the second contact hole,
first etching, second etching and third etching are performed in the step of forming the first contact hole and the second contact hole,
the second etching is performed after the first etching,
the third etching is performed after the second etching,
after the first etching and before the second etching, the first main surface is exposed from the first contact hole while the interlayer insulating film remains in a bottom surface of the second contact hole,
after the second etching and before the third etching, the second impurity diffusion region is exposed from the first contact hole while the interlayer insulating film remains in the bottom surface of the second contact hole, and
after the third etching, the polysilicon film is exposed from the second contact hole.

2. The manufacturing method of the semiconductor device according to claim 1 ,
wherein an opening area of the second contact hole in plan view is larger than an opening area of the first contact hole in plan view, and
a condition of the first etching is set such that a deposition amount during the first etching increases as the opening area of the second contact hole in plan view increases.

3. The manufacturing method of the semiconductor device according to claim 2 ,
wherein an etching gas used for the first etching is a fluorocarbon-based gas having a C/F ratio that is equal to or higher than 0.50, and is used together with argon and oxygen, and
a temperature of the semiconductor substrate during the first etching is equal to or lower than 20° C.

4. The manufacturing method of the semiconductor device according to claim 1 ,
wherein the first contact hole and the second contact hole extend in a first direction in plan view,
a width of the first contact hole in a second direction orthogonal to the first direction is larger than a width of the second contact hole in the second direction, and
a condition of the first etching is set such that the width of the first contact hole in the second direction and the width of the second contact hole in the second direction decrease as a distance from an upper surface of the interlayer insulating film increases.

5. The manufacturing method of the semiconductor device according to claim 4 ,
wherein an etching gas used for the first etching is a fluorocarbon-based gas, and contains hydrogen.

6. The manufacturing method of the semiconductor device according to claim 1 ,
wherein the first contact hole and the second contact hole extend in a first direction in plan view,
a width of the first contact hole in a second direction orthogonal to the first direction is larger than a width of the second contact hole in the second direction, and
a condition of the first etching is set such that an etching rate decreases as the width of the second contact hole in the second direction decreases.

7. The manufacturing method of the semiconductor device according to claim 6 ,
wherein an etching gas used for the first etching is a fluorocarbon-based gas, and
a pressure in a chamber during the first etching is equal to or higher than 50 mTorr.

8. The manufacturing method of the semiconductor device according to claim 1 , further comprising the steps of:
forming a resist on the interlayer insulating film; and
patterning the resist by photolithography so that the resist has a first opening at a position corresponding to the first contact hole, and a second opening at a position corresponding to the second contact hole,
wherein, before the first etching, the interlayer insulating film is exposed from the first opening while the resist remains in a bottom surface of the second opening, and
a condition of the first etching is set such that an etching rate for the interlayer insulating film is larger than an etching rate for the resist.

9. The manufacturing method of the semiconductor device according to claim 8 ,
wherein, in the photolithography, the resist is exposed using a reticle having a first light-transmitting section and a second light-transmitting section,
portions of the resist where the first opening and the second opening are formed are exposed by light transmitted through the first light-transmitting section and light transmitted through the second light-transmitting section, respectively, and
a transmittance of the first light-transmitting section is higher than a transmittance of the second light-transmitting section.

10. The manufacturing method of the semiconductor device according to claim 9 ,
wherein an etching gas used for the first etching is a fluorocarbon-based gas having a C/F ratio that is equal to or higher than 0.5, and is used together with argon and oxygen.

Assignees

• Renesas Electronics Corp

Inventors

• Maruyama Takahiro
• Hagiwara Takuya
• Maruyama Takuya

Classifications

• H10P50/283

  by chemical means · CPC title

• H10W20/0698

  Local interconnections · CPC title

• H10D12/481 Primary

  having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs · CPC title

• H10D12/038 Primary

  having a recessed gate, e.g. trench-gate IGBTs · CPC title

• H10D64/117

  Recessed field plates, e.g. trench field plates or buried field plates · CPC title