Pixel circuit, pixel driving method and display device

Patent metadata

Field	Value
Publication number	US-12412508-B2
Application number	US-202218275555-A
Country	US
Kind code	B2
Filing date	Sep 1, 2022
Priority date	Sep 1, 2022
Publication date	Sep 9, 2025
Grant date	Sep 9, 2025

Abstract

A pixel circuit, a pixel driving method and a display device are provided. The pixel circuit includes a driving circuit, a light emitting element and a light emitting gating control circuit; the driving circuit is electrically connected to a first electrode of the light emitting element, and is configured to drive the light emitting element; the light emitting gating control circuit is configured to form a current path between the second electrode of the light emitting element and the first voltage terminal under the control of the first control signal provided by the first control terminal according to the first light emitting control voltage provided by the first light emitting control voltage terminal and the light emitting data voltage provided by the light emitting data voltage terminal, to control the driving circuit to control the light emitting element to emit light.

First claim

What is claimed is:

1. A pixel circuit, comprising a driving circuit, a light emitting element and a light emitting gating control circuit; wherein
the driving circuit is electrically connected to a first electrode of the light emitting element, and is configured to drive the light emitting element; the light emitting gating control circuit is electrically connected to a second electrode of the light emitting element, a first control terminal, a first light emitting control voltage terminal, and a light emitting data voltage terminal, and is configured to form a current path between the second electrode of the light emitting element and a first voltage terminal under the control of a first control signal provided by the first control terminal according to a first light emitting control voltage provided by the first light emitting control voltage terminal and a light emitting data voltage provided by the light emitting data voltage terminal, to control the driving circuit to control the light emitting element to emit light; or
the driving circuit is electrically connected to the light emitting element through the light emitting gating control circuit; the light emitting gating control circuit is electrically connected to the driving circuit, the first control terminal, a first control voltage terminal and the light emitting data voltage terminal respectively, and is configured to form a current path between the driving circuit and the light emitting element under the control the first control signal according to the first light emitting control voltage and the light emitting data voltage, to control the driving circuit to control the light emitting element to emit light,
wherein the light emitting gating control circuit is electrically connected to a second light emitting control voltage terminal; the light emitting gating control circuit is also configured to from the current path under the control of a second light emitting control voltage provided by the second light emitting control voltage terminal,
wherein the light emitting gating control circuit includes a first light emitting control circuit, a second light emitting control circuit, a first gating control circuit and a second gating control circuit,
wherein the first light emitting control circuit is electrically connected to a first light emitting control terminal, the second electrode of the light emitting element, and the first voltage terminal, and is configured to control to connect the second electrode of the light emitting element and the first voltage terminal under the control of a potential of the first light emitting control terminal,
wherein the second light emitting control circuit is electrically connected to a second light emitting control terminal, the second electrode of the light emitting element, and the first voltage terminal, and is configured to control to connect the second electrode of the light emitting element and the first voltage terminal under the control of a potential of the second light emitting control terminal,
wherein the first gating control circuit is electrically connected to the first control terminal, the first light emitting control voltage terminal and the first light emitting control terminal respectively, and is configured to write the first light emitting control voltage provided by the first light emitting control voltage terminal into the first light emitting control terminal under the control of the first control signal provided by the first control terminal, and
wherein the second gating control circuit is electrically connected to the first control terminal, a second light emitting control voltage terminal, a second control terminal, the light emitting data voltage terminal and the second light emitting control terminal, and is configured to write a second light emitting control voltage provided by the second light emitting control voltage terminal into the second control terminal under the control of the first control signal provided by the first control terminal, and write a light emitting data voltage provided by the light emitting data voltage terminal into the second light emitting control terminal under the control of a potential of the second control terminal.

2. The pixel circuit according to claim 1 , further comprising a first energy storage circuit and a second energy storage circuit;
a first terminal of the first energy storage circuit is electrically connected to the first light emitting control terminal, a second terminal of the first energy storage circuit is electrically connected to a first initial voltage terminal, and the first energy storage circuit is configured to store electrical energy;
a first terminal of the second energy storage circuit is electrically connected to the second control terminal, a second terminal of the second energy storage circuit is electrically connected to a second initial voltage terminal, and the second energy storage circuit is configured to store electrical energy.

3. The pixel circuit according to claim 1 , wherein the first light emitting control circuit includes a first transistor, and the second light emitting control circuit includes a second transistor;
a control electrode of the first transistor is electrically connected to the first light emitting control terminal, a first electrode of the first transistor is electrically connected to the second electrode of the light emitting element, and a second electrode of the first transistor is electrically connected to the first voltage terminal;
a control electrode of the second transistor is electrically connected to the second light emitting control terminal, a first electrode of the second transistor is electrically connected to the second electrode of the light emitting element, and a second electrode of the second transistor is electrically connected to the first voltage terminal.

4. The pixel circuit according to claim 3 , wherein the driving circuit includes a driving transistor; a width-to length ratio of the first transistor is greater than a width-to length ratio of the driving transistor, and a width-to length ratio of the second transistor is greater than the width-to length ratio of the driving transistor.

5. The pixel circuit of claim 3 , wherein the first gating control circuit comprises a third transistor;
a control electrode of the third transistor is electrically connected to the first control terminal, a first electrode of the third transistor is electrically connected to the first light emitting control voltage terminal, and a second electrode of the third transistor is electrically connected to the first light emitting control terminal;
the second gating control circuit includes a fourth transistor and a fifth transistor;
a control electrode of the fourth transistor is electrically connected to the first control terminal, a first electrode of the fourth transistor is electrically connected to the second light emitting control voltage terminal, and a second electrode of the fourth transistor is electrically connected to the second control terminal;
a control electrode of the fifth transistor is electrically connected to the second control terminal, a first electrode of the fifth transistor is electrically connected to the light emitting data voltage terminal, and a second electrode of the fifth transistor is electrically connected to the second light emitting control terminal.

6. The pixel circuit according to claim 1 , further comprising a data writing-in circuit and a compensation on-off circuit; a first terminal of the driving circuit is electrically connected to a second voltage terminal; the driving circuit is configured to generate a driving current under the control of a potential of a control terminal of the driving circuit;
the data writing-in circuit is elect

Assignees

• Boe Technology Group Co Ltd

Inventors

• Zhao Jiao
• Guo Yuzhen
• Zheng Haoliang
• Xiao Li
• Zhang Chenyang
• Cui Xiaorong
• Xuan Minghua
• Chen Wanzhi
• Qu Yan

Classifications

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title

• G09G2300/0861

  with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title

• G09G2300/0852

  being a dynamic memory with more than one capacitor · CPC title

• G09G2300/0819

  used for counteracting undesired variations, e.g. feedback or autozeroing · CPC title

• G09G2300/0465

  Improved aperture ratio, e.g. by size reduction of the pixel circuit, e.g. for improving the pixel density or the maximum displayable luminance or brightness · CPC title