Storage device and preparation method, read-write method, storage chip and electronic device

Patent metadata

Field	Value
Publication number	US-12406709-B2
Application number	US-202318216435-A
Country	US
Kind code	B2
Filing date	Jun 29, 2023
Priority date	Dec 31, 2020
Publication date	Sep 2, 2025
Grant date	Sep 2, 2025

Abstract

Embodiments of this application provide a storage component, a preparation method, a reading/writing method, a storage chip, and an electronic device, is related to the storage technology field, and is used to resolve a problem that a quantity of storage states of a spin orbit torque-magnetic random access memory is increased while a storage state change range remains unchanged. The storage component includes: a first magnetic tunnel junction, a spin orbit coupling layer and a second magnetic tunnel junction that are sequentially arranged in a stacked manner. The first magnetic tunnel junction includes a first free layer, and the second magnetic tunnel junction includes a second free layer. The first free layer and the second free layer are arranged on two opposite surfaces of the spin orbit coupling layer.

First claim

What is claimed is:

1. A storage component comprising:
a first magnetic tunnel junction having a first free layer, a first tunneling layer, and a first fixed layer;
a spin orbit coupling layer; and
a second magnetic tunnel junction having a second free layer, a second tunneling layer, and a second fixed layer, wherein the first free layer and the second free layer are arranged on two opposite surfaces of the spin orbit coupling layer, and wherein the first magnetic tunnel junction, the spin orbit coupling layer, and the second magnetic tunnel junction are sequentially arranged in a stacked manner.

2. The storage component according to claim 1 , wherein the first magnetic tunnel junction and the second magnetic tunnel junction are of a same structure.

3. The storage component according to claim 1 , wherein the first tunneling layer and the first fixed layer are sequentially arranged on the first free layer in a stacked manner; and/or
wherein the second tunneling layer and the second fixed layer are sequentially arranged on the second free layer in a stacked manner.

4. The storage component according to claim 1 , wherein the storage component further comprises a first electrode and a second electrode; and
the first electrode and the second electrode are coupled to two opposite sides of the spin orbit coupling layer.

5. The storage component according to claim 4 , wherein the storage component further comprises a third electrode and a fourth electrode; and
wherein the third electrode is coupled to the first fixed layer of the first magnetic tunnel junction, and the fourth electrode is coupled to the second fixed layer of the second magnetic tunnel junction.

6. The storage component of claim 5 , wherein the second electrode, the third electrode, and the fourth electrode are separately coupled to a reference ground end.

7. A storage chip, comprising the storage component according to claim 1 .

8. The storage chip according to claim 7 , wherein the storage chip further comprises a differential amplifier, and
wherein a first input end of the differential amplifier is coupled to a third electrode of the storage component, and a second input end of the differential amplifier is coupled to a fourth electrode of the storage component.

9. The storage chip according to claim 8 , wherein a first input end of the differential amplifier is coupled to multiple third electrodes, and a second input end of the differential amplifier is coupled to multiple fourth electrodes; and
wherein the storage chip further comprises a time-sharing read control circuit, wherein the time-sharing read control circuit is coupled to the storage component, and is configured to send a time-sharing read instruction to the storage component, so that the multiple third electrodes transmit signals to the first input end of the differential amplifier in a time-sharing manner, and the multiple fourth electrodes transmit signals to the second input end of the differential amplifier in a time-sharing manner.

10. An electronic device comprising the storage chip according to claim 7 .

11. An electronic device comprising the storage component according to claim 1 .

12. A preparation method of a storage component, the preparation method comprising:
forming, on a substrate, a first magnetic tunnel junction, a spin orbit coupling layer, and a second magnetic tunnel junction that are sequentially arranged in a stacked manner,
wherein the first magnetic tunnel junction comprises a first free layer, a first tunneling layer and a first fixed layer, the second magnetic tunnel junction comprises a second free layer, a second tunneling layer and a second fixed layer, and the first free layer and the second free layer are arranged on two opposite surfaces of the spin orbit coupling layer.

13. The preparation method according to claim 12 , wherein forming the first magnetic tunnel junction, the spin orbit coupling layer, and the second magnetic tunnel junction comprises:
forming a first fixed thin film on the substrate;
forming a first tunneling thin film on a surface that is of the first fixed thin film and that is away from the substrate;
forming a first free thin film on a surface that is of the first tunneling thin film and that is away from the first fixed thin film;
forming a spin orbit coupling thin film on a surface that is of the first free thin film and that is away from the first tunneling thin film;
forming a second free thin film on a surface that is of the spin orbit coupling thin film and that is away from the first free thin film;
forming a second tunneling thin film on a surface that is of the second free thin film and that is away from the spin orbit coupling thin film;
forming a second fixed thin film on a surface that is of the second tunneling thin film and that is away from the second free thin film; and
patterning the first fixed thin film, the first tunneling thin film, the first free thin film, the spin orbit coupling thin film, the second free thin film, the second tunneling thin film, and the second fixed thin film by using a patterning process, to form the first magnetic tunnel junction that is formed by sequentially stacking the first fixed layer, the first tunneling layer, and the first free layer, the spin orbit coupling layer, and the second magnetic tunnel junction that is formed by sequentially stacking the second free layer, the second tunneling layer, and the second fixed layer.

14. A reading method of a storage component, the reading method comprising:
at the storage component, which comprises a first magnetic tunnel junction, a spin orbit coupling layer, and a second magnetic tunnel junction that are sequentially arranged in a stacked manner:
applying a voltage signal to the spin orbit coupling layer;
reading an output current of the spin orbit coupling layer; and
obtaining, based on the output current of the spin orbit coupling layer, data stored in the first magnetic tunnel junction and the second magnetic tunnel junction, wherein the first magnetic tunnel junction has a first free layer, a first tunneling layer and a first fixed layer, wherein the second magnetic tunnel junction has a second free layer, a second tunneling layer and a second fixed layer.

15. The reading method according to claim 14 , wherein obtaining the data stored in the first magnetic tunnel junction and the second magnetic tunnel junction comprises:
reading data corresponding to a low resistive state when Iout=Iin+Iish;
reading a medium resistive state when Iout=Iin+1/2 Iish; or
reading a high resistive state when Iout=Iin, wherein Iout is the output current of the spin orbit coupling layer, Iin is an in-plane current generated after the voltage signal is applied to the spin orbit coupling layer, and Iish is an inverse spin Hall current generated by an inverse spin Hall effect after the voltage signal is applied to the spin orbit coupling layer.

16. A reading method of a storage component, the reading method comprising:
at the storage component, which comprises a first magnetic tunnel junction, a spin orbit coupling layer, and a second magnetic tunnel junction that are sequentially arranged in a stacked manner:
applying a voltage signal to the spin orbit coupling layer;
reading an output current of the first magnetic tunnel junction and an output current of the second magnetic tunnel junction, wherein the first magnetic tunnel junction has a first free layer, a first tunneling layer and a first fixed layer,, wherein the second magnetic tunnel junction has a second free layer, a second tunneling layer and a second f

Assignees

• Huawei Tech Co Ltd

Inventors

• He Liang
• Yan Xin
• Zhao Yafei
• Ning Jiai
• Zhao Junfeng
• Tang Wentao

Classifications

• G11C11/1697

  Power supply circuits · CPC title

• G11C11/1675

  Writing or programming circuits or methods · CPC title

• G11C11/1673

  Reading or sensing circuits or methods · CPC title

• H10N50/10 Primary

  Magnetoresistive devices · CPC title

• H10N50/01

  Manufacture or treatment · CPC title