Shoot-through protection circuit

Patent metadata

Field	Value
Publication number	US-12401358-B1
Application number	US-202418442524-A
Country	US
Kind code	B1
Filing date	Feb 15, 2024
Priority date	Feb 15, 2024
Publication date	Aug 26, 2025
Grant date	Aug 26, 2025

Abstract

A circuit comprising: first and second transistors connected in series; a third transistor (TT) comprising a source connected to a source of the second transistor (ST), a gate connected to a gate of ST, and a drain connected to a gate of the first transistor (FT); and a gate driver circuit connected to the gates of FT, ST and TT and configured to provide (i) a first drive signal to the gate of FT to cause FT to transition between an on state and an off state and (ii) a second drive signal to the gates of ST and TT to cause ST and TT to transition between on states and off states. The TT is configured to prevent a shoot-through condition in the circuit by pulling the first drive signal down to a level of the source of the ST when the ST is in the on state.

First claim

We claim:

1. A circuit, comprising:
first and second transistors connected in series;
a third transistor comprising a source connected to a source of the second transistor, a gate connected to a gate of the second transistor, and a drain connected to a gate of the first transistor; and
gate driver circuits connected to the gates of the first, second and third transistors and configured to provide (i) a first drive signal to the gate of the first transistor to cause the first transistor to transition between an on state and an off state and (ii) a second drive signal to the gates of the second and third transistors to cause the second and third transistors to transition between on states and off states;
wherein the third transistor is configured to prevent a shoot-through condition in the circuit by pulling the first drive signal down to a level of the source of the second transistor when the second transistor is in the on state;
wherein the gate driver circuits are operable to cause the third transistor to be in the on state while the first transistor is in the off state; and
wherein the third transistor is configured to prevent the first transistor from being transitioned from the off state to the on state when a radiation or noise event occurs in a surrounding environment which impacts operation of the gate driver circuits.

2. The circuit according to claim 1 , wherein the first transistor is in the on state when the first gate drive signal has a first voltage value and the second and third transistors are in the off states when the second gate drive signal has a second voltage value lower than the first voltage value.

3. The circuit according to claim 2 , wherein the gate drive circuits are caused, by a radiation event occurring in a surrounding environment, to increase the second voltage value of the second gate drive signal.

4. The circuit according to claim 3 , wherein the third transistor prevents the shoot-through condition when the second gate drive signal has an increased second voltage value.

5. The circuit according to claim 1 , wherein at least the third transistor comprises a gallium nitride field effect transistor.

6. The circuit according to claim 1 , wherein the third transistor is further configured to prevent the first transistor from transitioning from the off state to the on state while the third transistor is in the on state.

7. The circuit according to claim 1 , where the first, second and third transistors are bipolar junction transistors with emitters replacing sources, collectors replacing drains, and bases replacing gates.

8. The circuit according to claim 1 , where the first and second transistors are insulated-gate bipolar transistors with emitters replacing sources, collectors replacing drains, and the third transistor comprises a field effect transistor.

9. A circuit, comprising:
first and second transistors connected in series;
a third transistor comprising a source connected to a source of the second transistor, a gate connected to a gate of the second transistor, and a drain connected to a gate of the first transistor; and
gate driver circuits connected to the gates of the first, second and third transistors and configured to provide (i) a first drive signal to the gate of the first transistor to cause the first transistor to transition between an on state and an off state and (ii) a second drive signal to the gates of the second and third transistors to cause the second and third transistors to transition between on states and off states;
wherein the third transistor is configured to prevent a shoot-through condition in the circuit by pulling the first drive signal down to a level of the source of the second transistor when the second transistor is in the on state;
a diode configured to limit a negative voltage at the gate of the first transistor with respect to a source of the second transistor while the third transistor is being used to prevent the shoot-through condition;
wherein the diode is selectively provided in the circuit based on relative state transition speeds of the first, second and third transistors.

10. A method for operating a circuit, comprising:
providing, by a gate driver circuit, a first high drive signal to a gate of a first transistor and a first low drive signal to a gate of a third transistor and a gate of a second transistor that is connected in series with the first transistor, whereby the first transistor is transitioned to an on state and the second and third transistors are transitioned to off states;
providing a second high drive signal from the gate driver circuit concurrently to the gates of the second and third transistors to cause the second and third transistors to transition from the off states to on states while the first transistor is still in the on state; and
using the third transistor to prevent a shoot-through condition by pulling down a voltage of the first high drive signal being output from the gate driver circuit to a level that causes the first transistor to transition from the on state to an off state while the second and third transistor is in the on state;
wherein the second high drive signal is provided from the gate driver circuit responsive to a radiation or noise event in a surrounding environment.

11. The method according to claim 10 , wherein the second transistor comprises a gallium nitride field effect transistor.

12. The method according to claim 10 , further comprising preventing, by the third transistor, the first transistor from transitioning from the off state to the on state while the second transistor is in the on state.

13. The method according to claim 10 , further comprising using a diode to limit a negative voltage at the gate of the first transistor with respect to a source of the second transistor while the third transistor is being used to prevent the shoot-through condition.

14. The method according to claim 13 , further comprising selectively providing the diode in the circuit based on relative state transition speeds of the first, second and third transistors.

15. The method according to claim 10 , further comprising operating the gate driver circuit to cause the third transistor to be in the on state while the first transistor is in the off state.

16. The method according to claim 15 , further comprising using the second transistor to prevent the first transistor from being transitioned from the off state to the on state when a radiation event occurs in a surrounding environment which impacts operation of the gate driver circuit.

17. A circuit, comprising:
first and second transistors of a P-channel type connected in series;
a third transistor comprising a source connected to a source of the second transistor, a gate connected to a gate of the second transistor, and a drain connected to a gate of the first transistor; and
gate driver circuits connected to the gates of the first, second and third transistors and configured to provide (i) a first drive signal to the gate of the first transistor to cause the first transistor to transition between an on state and an off state and (ii) a second drive signal to the gates of the second and third transistors to cause the second and third transistors to transition between on states and off states;
wherein the third transistor also a P-channel type is configured to prevent a shoot-through condition in the circuit by pulling the first drive signal up to a level of the source of the second transistor when the second transistor is in the on state;
wherein the gate driver circuits are operable to cause the third transi

Assignees

• Aerojet Rocketdyne Inc

Inventors

• Koch Brian
• Kristalinski Alexandr L

Classifications

• H03K2217/0072

  Low side switches, i.e. the lower potential [DC] or neutral wire [AC] being directly connected to the switch and not via the load · CPC title

• H03K2217/0063

  High side switches, i.e. the higher potential [DC] or life wire [AC] being directly connected to the switch and not via the load · CPC title

• H02M3/335

  using semiconductor devices only · CPC title

• H02M1/08

  Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

• H03K2017/066

  Maximizing the OFF-resistance instead of minimizing the ON-resistance · CPC title