Low power receiver and related circuits

US12401323B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12401323-B2
Application numberUS-202418436459-A
CountryUS
Kind codeB2
Filing dateFeb 8, 2024
Priority dateMay 30, 2019
Publication dateAug 26, 2025
Grant dateAug 26, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Low power radio frequency (RF) receivers and related circuits are described.

First claim

Opening claim text (preview).

What is claimed is: 1. A radio frequency (RF) receiver, comprising: an RF gain stage configured to amplify an RF signal, the RF signal being characterized by a bit duration; an envelope detector following the RF gain stage; baseband circuitry following the envelope detector, the baseband circuitry being configured to detect a modulating signal transmitted with the RF signal; and enable circuitry configured to enable the RF gain stage to sample the RF signal using a sampling duration. 2. The RF receiver of claim 1 , wherein the RF gain stage includes a regenerative ring amplifier, the regenerative ring amplifier employing feedback that does not include inductive components, and wherein the feedback includes a tunable capacitor configured to maintain operation of the regenerative ring amplifier near an instability point. 3. The RF receiver of claim 2 , wherein the tunable capacitor is fixed during operation of the RF receiver. 4. The RF receiver of claim 2 , wherein the tunable capacitor is dynamically tunable during operation of the RF receiver, and wherein the tunable capacitor is dynamically tunable during the sampling duration. 5. The RF receiver of claim 1 , further comprising auxiliary receiver circuitry configured to receive the RF signal and to adjust one or more parameters of the RF receiver in response to detection of RF interference, wherein the auxiliary receiver circuitry includes a second RF gain stage and a second envelope detector preceding the second RF gain stage. 6. The RF receiver of claim 1 , further comprising a high-Q filter following the RF gain stage and preceding the envelope detector, wherein the high-Q filter includes a micro-electromechanical component, wherein the RF gain stage, the envelope detector, and the enable circuitry are implemented in one or more integrated circuits, and wherein the high-Q filter is implemented with one or more discrete components separate from the one or more integrated circuits. 7. The RF receiver of claim 1 , wherein the enable circuitry is also configured to enable the baseband circuitry before enabling the RF gain stage, and wherein the enable circuitry is configured to enable different parts of the baseband circuitry at different times. 8. The RF receiver of claim 1 , further comprising a high-Q filter preceding the RF gain stage. 9. The RF receiver of claim 1 , further comprising an impedance matching network preceding the RF gain stage. 10. The RF receiver of claim 1 , wherein the enable circuitry is configured to enable the RF gain stage to sample the RF signal multiple times during the bit duration. 11. The RF receiver of claim 1 , wherein the sampling duration is configurable down to less than 10% or 1% of the bit duration. 12. The RF receiver of claim 1 , wherein the envelope detector is a triode-mode envelope detector. 13. The RF receiver of claim 1 , further comprising control circuitry configured to control gain of one or more gain components of the baseband circuitry and to control a dynamic range associated with one or more detection components of the baseband circuitry, wherein the one or more detection components of the baseband circuitry include a first comparator configured to detect bits transmitted with the RF signal, and wherein the control circuitry is configured to control the dynamic range by adjusting a comparator threshold associated with the first comparator, wherein the one or more detection components of the baseband circuitry include a second comparator and a third comparator, the second and third comparator being configured to generate range signals representing an amplified signal level of the envelope detector in relation to the dynamic range, and wherein the control circuitry is configured to control the dynamic range based on the range signals. 14. The RF receiver of claim 1 , wherein the modulating signal transmitted with the RF signal is represented by a sequence of bits, each bit being represented using a first tone at a first frequency and a second tone at a second frequency, and wherein the baseband circuitry includes a bandpass filter configured to reject interfering signals. 15. The RF receiver of claim 1 , wherein the modulating signal transmitted with the RF signal is represented by a sequence of bits, each bit being represented using a reference tone at a reference frequency and either a first tone at a first frequency or a second tone at a second frequency, the first and second tones being used alternately in conjunction with the reference tone to represent successive bits, and wherein the baseband circuitry includes a bandpass filter configured to reject interfering signals, and wherein the baseband circuitry is configured to detect the sequence of bits without a local oscillator.

Assignees

Inventors

Classifications

  • Circuits · CPC title

  • the amplifier being a radio frequency amplifier · CPC title

  • A circuit being added at the input of an amplifier to adapt the input impedance of the amplifier · CPC title

  • A non-specified detector of the power of a signal being used in an amplifying circuit · CPC title

  • with semiconductor devices only · CPC title

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Frequently asked questions

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What does patent US12401323B2 cover?
Low power radio frequency (RF) receivers and related circuits are described.
Who is the assignee on this patent?
Univ Virginia Patent Foundation
What technology area does this patent fall under?
Primary CPC classification H03F1/0222. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 26 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 9 related publications on this page (citations in our corpus or others sharing the same primary CPC).