Control method for current-limiting control circuit and electrical system

US12401188B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12401188-B2
Application numberUS-202118016236-A
CountryUS
Kind codeB2
Filing dateJul 12, 2021
Priority dateNov 9, 2020
Publication dateAug 26, 2025
Grant dateAug 26, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present disclosure provides a control method for a current-limiting control circuit and an electrical system. The current-limiting control circuit includes a high voltage side connected with a direct-current (DC) bus, a low voltage side connected with a load, and a regulating unit connected with the high voltage side and the low voltage side, the regulating unit including at least one MOS transistor, and the control method includes: detecting current I 0 of the current-limiting control circuit; determining whether the current I 0 is greater than a preset current I; and determining that the current-limiting control circuit has a short circuit fault, and entering a current limiting control mode to limit a persistent growth of the current, in a case where the current I 0 is greater than the preset current I.

First claim

Opening claim text (preview).

What is claimed is: 1. A control method for a current-limiting control circuit, the current-limiting control circuit comprising a high voltage side connected with a direct-current (DC) bus, a low voltage side connected with a load, and a regulating unit connected with the high voltage side and the low voltage side, the regulating unit comprising at least one MOS transistor, wherein the control method comprises: detecting current I 0 of the current-limiting control circuit; determining whether the current I 0 is greater than a preset current I; and determining that the current-limiting control circuit has a short circuit fault, and entering a current limiting control mode to limit a persistent growth of the current I 0 , in a case where the current I 0 is greater than the preset current I, wherein the current limiting control mode comprises a primary side voltage droop control mode used to adjust current of the high voltage side, and the control method comprises: detecting whether there is a voltage across the load before entering the current limiting control mode; and determining that the DC bus has a short circuit fault, and entering the primary side voltage droop control mode, in a case where there is a voltage across the load. 2. The control method according to claim 1 , further comprising: determining that the current-limiting control circuit works normally and entering a bidirectional conduction mode to achieve a bidirectional conduction between the low voltage side and the high voltage side through the MOS transistor and a parasitic diode on the MOS transistor, in a case where the current I0 is less than the preset current I. 3. The control method according to claim 1 , wherein the current limiting control mode comprises: a secondary side voltage droop control mode and the control method comprises: detecting whether there is a voltage across the load before entering the current limiting control mode; and determining that the load has a short circuit fault, and entering the secondary side voltage droop control mode, which is used to adjust current of the low voltage side, in a case where there is no voltage across the load. 4. The control method according to claim 3 , wherein the secondary side voltage droop control mode comprises: entering a second droop control stage, and adjusting an input current of the MOS transistor by adjusting a duty cycle of the MOS transistor to reduce a voltage of the low voltage side and keep an output power of the low voltage side unchanged; determining whether the current I 0 has reached a threshold current I 1 , wherein the threshold current I 1 is a maximum working current that the current-limiting control circuit can withstand; and entering a second constant current control stage, and performing a PI adjustment by adjusting the duty cycle of the MOS transistor, to keep current of the low voltage side unchanged, in a case where the current I 0 has reached a threshold current I 1 . 5. The control method according to claim 1 , wherein the primary side voltage droop control mode comprises: entering a first droop control stage, and adjusting an input current of the MOS transistor by adjusting a duty cycle of the MOS transistor to reduce a voltage of the high voltage side and keep an output power of the high voltage side unchanged; determining whether the current I 0 has reached a threshold current I 1 , wherein the threshold current I 1 is a maximum working current that the current-limiting control circuit can withstand; and entering a first constant current control stage, and performing a PI adjustment by adjusting the duty cycle of the MOS transistor, to keep current of the high voltage side unchanged, in a case where the current I 0 has reached a threshold current I 1 . 6. The control method according to claim 1 , further comprising: determining whether operating parameters of the current-limiting control circuit meet a maximum power control condition before entering the current limiting control mode; and entering a maximum power tracking control mode in a case where the operating parameters of the current-limiting control circuit meet the maximum power control condition, and entering the current limiting control mode in a case where the operating parameters of the current-limiting control circuit do not meet the maximum power control condition. 7. The control method according to claim 6 , wherein the maximum power tracking control mode comprises: detecting an output power of the low voltage side to obtain a first detection power P 0 , adjusting a duty cycle of the MOS transistor to change the output power of the low voltage side, and detecting the output power the low voltage side again to obtain a second detection power P 1 , in a case where the current I 0 reaches the threshold current I 1 ; determining whether the first detection power P 0 is greater than the second detection power P 1 ; adjusting the duty cycle of the MOS transistor to maintain the output power of the low voltage side to the first detection power P 0 , in a case where the first detection power P 0 is greater than the second detection power P 1 , and adjusting the duty cycle of the MOS transistor to maintain the output power of the low voltage side to the second detection power P 1 , in a case where the first detection power P 0 is lower than the second detection power P 1 . 8. An electrical system, in which the control method of a current-limiting control circuit according to claim 1 is adopted. 9. The electrical system according to claim 8 , comprising the DC bus and at least one load connected to the DC bus, wherein the high voltage side of the current-limiting control circuit is connected to the DC bus, and the low voltage side of the current-limiting control circuit is connected to the at least one load. 10. An electrical system, comprising a memory and a processor, wherein the memory stores computer programs, which when executed by the processor, cause the processor to perform the control method of a current-limiting control circuit according to claim 1 . 11. The electrical system according to claim 10 , wherein the memory further stores computer programs, which when executed by the processor, cause the processor to: determine that the current-limiting control circuit works normally and entering a bidirectional conduction mode to achieve a bidirectional conduction between the low voltage side and the high voltage side through the MOS transistor and a parasitic diode on the MOS transistor, in a case where the current I 0 is less than the preset current I. 12. The electrical system according to claim 10 , wherein the current limiting control mode comprises: a secondary side voltage droop control mode and the computer programs when executed by the processor, cause the processor to: detect whether there is a voltage across the load before entering the current limiting control mode; and determine that the load has a short circuit fault, and enter the secondary side voltage droop control mode, which is used to adjust current of the low voltage side, in a case where there is no voltage across the load. 13. The electrical system according to claim 12 , wherein the secondary side voltage droop control mode comprises: entering a second droop control stage, and adjusting an input current of the MOS transistor by adjusting a duty cycle of the MOS transistor to reduce a voltage of the low voltage side and keep an output power of the low voltage side unchanged; determining whether the current I 0 has reached a threshold current I 1 , wherein the threshold current I 1 is a maximum working current that the current-li

Assignees

Inventors

Classifications

  • for DC applications · CPC title

  • concerning the detecting means (in general G01R or other subclasses of G01; reed switches H01H71/2445) · CPC title

  • for DC-DC converters · CPC title

  • Checking correct functioning of protective arrangements, e.g. by simulating a fault (for differential current circuit breakers H02H3/335) · CPC title

  • H02H9/025Primary

    Current limitation using field effect transistors · CPC title

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What does patent US12401188B2 cover?
The present disclosure provides a control method for a current-limiting control circuit and an electrical system. The current-limiting control circuit includes a high voltage side connected with a direct-current (DC) bus, a low voltage side connected with a load, and a regulating unit connected with the high voltage side and the low voltage side, the regulating unit including at least one MOS t…
Who is the assignee on this patent?
Gree Electric Appliances Inc Zhuhai
What technology area does this patent fall under?
Primary CPC classification H02H9/025. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 26 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).