Parity-time (pt)-symmetric wireless telemetric sensors and systems
US-2020012008-A1 · Jan 9, 2020 · US
US12395141B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12395141-B2 |
| Application number | US-202318196202-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 11, 2023 |
| Priority date | Nov 17, 2020 |
| Publication date | Aug 19, 2025 |
| Grant date | Aug 19, 2025 |
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Disclosed are example embodiments of a circuit comprising a first inductor-capacitor (LC) loop, a second LC loop having at least one of a series connection or parallel connection to the first LC loop, and a gyrator coupled between the first LC loop and the second LC loop. In an example, the first LC and the second LC loop each include an inductive element (L) and a capacitive (C) element coupled to each other in series. In another example, the first LC and the second LC loop each include an inductive element (L) and a capacitive (C) element coupled to each other in parallel.
Opening claim text (preview).
The invention claimed is: 1. A circuit comprising: a first inductor-capacitor (LC) loop; a second LC loop having at least one of a series connection or parallel connection to the first LC loop; and a gyrator coupled between the first LC loop and the second LC loop, wherein the first LC loop and the second LC loop each include an inductive element (L) and a capacitive (C) element coupled to each other in series. 2. The circuit of claim 1 , wherein a circuit state before a measurement is a work state, wherein a quantity, w, in relations Δ ( C 1 ) = w + x with ( ω 0 1 ω 0 2 - 1 ) w < 0 , ❘ "\[LeftBracketingBar]" x ❘ "\[RightBracketingBar]" ≤ ❘ "\[LeftBracketingBar]" w ❘ "\[RightBracketingBar]" 2 , ❘ "\[LeftBracketingBar]" w ❘ "\[RightBracketingBar]" ≪ 1 under assumption −(ω 01 /ω 02 −1) w>0 is referred to as a work point, wherein w=0 corresponds to an exceptional point of degeneracy (EPD) point, and the parameter w is selected to ensure that −(ω 01 /ω 02 −1) Δ(C 1 )>0 thereby enforcing circuit stability near the exceptional point of degeneracy, where C 1 is a capacitance, ω 01 is an angular resonance frequency, ω 02 is an angular resonance frequency, wherein the work state is defined as a steady-state operating condition of the circuit immediately prior to the measurement event, wherein the circuit state refers to a configuration of the circuit defined by the values of capacitive and inductive elements therein and an operating frequency thereof. 3. The circuit of claim 1 , wherein a circuit parameter, X, corresponding to a sensor element, is greater than zero. 4. The circuit of claim 1 , wherein an exceptional point of degeneracy (EPD) point is chosen so that ω 01 = 1 L 1 C 1 > ω 02 = 1 L 2 C 2 . where L 1 is an inductance of the first LC loop, L 2 is an inductance of the second LC loop, C 1 is a capacitance of the first LC loop, C 2 is a capacitance of the second LC loop, R g is a resistance of the gyrator, ω 01 is an angular resonance frequency of the first LC loop, and ω 02 is an angular resonance frequency of the second LC loop. 5. The circuit of claim 2 , wherein the first LC loop, the second LC loop, and the gyrator are configured such that parameters of the circuit satisfy: sgn (ω 01 2 )= sgn (ω 02 2 )=− sgn ( L 1 L 2 )=±1 and R g 2 =(|ω 01 |±|ω 02 1 ) 2 |L 1 L 2 |, where L 1 is an inductance of the first LC loop, L 2 is an inductance of the second LC loop, C 1 is a capacitance of the first LC loop, C 2 is a capacitance of the second LC loop, Re is a resistance of the gyrator, ω 01 is an angular resonance frequency of the first LC loop, and ω 02 is an angular resonance frequency of the second LC loop. 6. The circuit of claim 5 , wherein the first LC loop comprises a first inductive element and a first capacitive element, of positive values, wherein a second LC loop comprises a second inductive element and a second capacitive element, of negative values, wherein the gyrator couples the first LC loop and the second LC loop. 7. The circuit of claim 5 , wherein the first LC loop comprises a first inductive element and a first capacitive element, one with a positive value while the other has a negative value, wherein the second LC loop comprises a second inductive element and a second capacitive element, one with a positive value while the other has a negative value, wherein the gyrator couples the first LC loop and the second LC loop. 8. The circuit of claim 2
comprising only inductors and capacitors (H03H7/075, H03H7/09, H03H7/12, H03H7/13 take precedence) · CPC title
using gyrators · CPC title
Parallel LC in shunt or branch path (H03H7/1791 takes precedence) · CPC title
Series LC in series path (H03H7/1783 takes precedence) · CPC title
Gyrators · CPC title
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