Display device and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-12389681-B2
Application number	US-202217841904-A
Country	US
Kind code	B2
Filing date	Jun 16, 2022
Priority date	Aug 17, 2021
Publication date	Aug 12, 2025
Grant date	Aug 12, 2025

Abstract

A display device includes a first semiconductor layer, a first conductive layer disposed on the first semiconductor layer and including a first capacitor electrode at least partially overlapping the first semiconductor layer in a plan view to constitute a first transistor, a second capacitor electrode disposed on the first conductive layer and overlapping the first capacitor electrode in a plan view to constitute a first capacitor, a second semiconductor layer disposed on the second capacitor electrode and including a third capacitor electrode overlapping the second capacitor electrode in a plan view to constitute a second capacitor, a second conductive layer disposed on the second semiconductor layer and at least partially overlapping the second semiconductor layer, and a third conductive layer disposed over the second conductive layer to implement a high-resolution image by overlapping the first capacitor electrode, the second capacitor electrode, and the third capacitor electrode.

First claim

What is claimed is:

1. A display device comprising:
a first semiconductor layer;
a first conductive layer disposed on the first semiconductor layer and including a first capacitor electrode at least partially overlapping the first semiconductor layer in a plan view to constitute a first transistor;
a second capacitor electrode disposed on the first conductive layer and overlapping the first capacitor electrode in a plan view to constitute a first capacitor;
a second semiconductor layer disposed on the second capacitor electrode and including a third capacitor electrode overlapping the second capacitor electrode in a plan view to constitute a second capacitor;
a second conductive layer disposed on the second semiconductor layer and at least partially overlapping the second semiconductor layer; and
a third conductive layer disposed on the second conductive layer.

2. The display device of claim 1 , wherein the second capacitor electrode includes a first through hole exposing a portion of an upper surface of the first capacitor electrode, and the third capacitor electrode includes a second through hole overlapping the first through hole to expose the portion of the upper surface of the first capacitor electrode.

3. The display device of claim 2 , wherein the third conductive layer includes a first bridge electrode connecting the upper surface of the first capacitor electrode exposed through the first through hole and the second through hole, and the second semiconductor layer.

4. The display device of claim 1 , wherein the third capacitor electrode includes a third through hole exposing a portion of an upper surface of the second capacitor electrode.

5. The display device of claim 4 , wherein the third conductive layer includes a second bridge electrode connecting the portion of the upper surface of the second capacitor electrode exposed through the third through hole, and the second semiconductor layer.

6. The display device of claim 1 , wherein the second semiconductor layer and the second conductive layer constitute a second transistor, a third transistor, a fourth transistor, and a fifth transistor, and
wherein the first semiconductor layer and the first conductive layer constitute a sixth transistor, a seventh transistor, an eighth transistor, and a ninth transistor.

7. The display device of claim 6 , wherein the third conductive layer includes:
a first initialization voltage line connected to an input terminal of the fourth transistor; and
a second initialization voltage line connected to an input terminal of the seventh transistor while being spaced apart from the first initialization voltage line.

8. The display device of claim 1 , wherein an area of the second capacitor electrode is larger than an area of the first capacitor electrode and the second capacitor electrode completely covers the first capacitor electrode in a plan view.

9. The display device of claim 8 , wherein a size of a first overlapping area, which is an overlapping area between the first capacitor electrode and the second capacitor electrode in a plan view, is equal to a size of a second overlapping area, which is an overlapping area between the second capacitor electrode and the third capacitor electrode, in a plan view.

10. The display device of claim 1 , wherein the second semiconductor layer includes an oxide semiconductor.

11. The display device of claim 10 , wherein the second semiconductor layer includes a first oxide semiconductor pattern and a second oxide semiconductor pattern spaced apart from the first oxide semiconductor pattern.

12. The display device of claim 11 , wherein the third capacitor electrode is disposed between the first oxide semiconductor pattern and the second oxide semiconductor pattern in a plan view.

13. A display device comprising:
a first semiconductor layer;
a first conductive layer disposed on the first semiconductor layer and including a first capacitor electrode at least partially overlapping the first semiconductor layer in a plan view to constitute a first transistor;
a second capacitor electrode disposed on the first conductive layer and including an overlapping area overlapping the first capacitor electrode in a plan view to constitute a first capacitor, the second capacitor electrode including a protruding area protruding from the overlapping area;
a second semiconductor layer disposed on the second capacitor electrode and including a third capacitor electrode overlapping the second capacitor electrode in a plan view to constitute a second capacitor, the third capacitor electrode exposing the protruding area in a plan view;
a second conductive layer disposed on the second semiconductor layer and at least partially overlapping the second semiconductor layer; and
a third conductive layer disposed on the second conductive layer.

14. The display device of claim 13 , wherein the second semiconductor layer includes an oxide semiconductor.

15. The display device of claim 14 , wherein the second semiconductor layer includes a first oxide semiconductor pattern spaced apart from the third capacitor electrode in a first direction.

16. The display device of claim 15 , wherein the third conductive layer includes a first bridge electrode connected to the first oxide semiconductor pattern and the protruding area of the second capacitor electrode.

17. The display device of claim 15 , wherein the protruding area of the second capacitor electrode protrudes from the overlapping area of the second capacitor electrode in a second direction perpendicular to the first direction.

Assignees

• Samsung Display Co Ltd

Inventors

• Kim Myeongho
• Kim Jaybum
• Son Kyoung Seok
• Lee Seungjun
• Lee Seunghun
• Lim Jun Hyung

Classifications

• H10K59/1216

  the pixel elements being capacitors · CPC title

• H10D86/423

  comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO · CPC title

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D86/021

  of multiple TFTs · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title