Analog tracking circuit to improve dynamic and static image rejection of a frequency converter

Patent metadata

Field	Value
Publication number	US-12388451-B2
Application number	US-202217732099-A
Country	US
Kind code	B2
Filing date	Apr 28, 2022
Priority date	Apr 28, 2022
Publication date	Aug 12, 2025
Grant date	Aug 12, 2025

Abstract

Systems, devices, and methods related to frequency converter arrangements are provided. For example, a frequency converter arrangement converts a first signal centered at a first frequency to a second signal centered at a second frequency different from the first frequency. The frequency converter arrangement includes local oscillator (LO) circuitry and in-phase, quadrature-phase (IQ) mixer circuitry coupled to the LO circuitry. The LO circuitry includes duty cycle correction circuitry to adjust a duty cycle of a pair of input clock signals. The duty cycle correction circuitry includes coarse tuning circuitry responsive to a digital calibration code, and analog tuning loop circuitry. The LO circuitry further includes quadrature divider circuitry coupled to an output of the duty cycle correction circuitry, where the quadrature divider circuitry generates an in-phase LO signal and a quadrature-phase LO signal from a pair of output clock signals at outputs of the duty cycle correction circuitry.

First claim

The invention claimed is:

1. A frequency converter arrangement for converting a first signal centered at a first frequency to a second signal centered at a second frequency different from the first frequency, the frequency converter arrangement comprising:
local oscillator (LO) circuitry comprising:
duty cycle correction circuitry to adjust a duty cycle of a pair of input clock signals to provide a pair of output clock signals, wherein the duty cycle correction circuitry comprises:
(1) coarse tuning circuitry configured to correct the duty cycle of the pair of input clock signals, the coarse tuning circuitry responsive to a digital calibration code; and
(2) an analog feedback circuit comprising an analog input coupled to receive an analog signal generated from the pair of output clock signals and an analog output comprising a pair of differential clock paths provided to the coarse tuning circuitry, the analog feedback circuit comprising a current steering element coupled to the pair of differential clock paths, the current steering element configured to steer, responsive to an analog feedback signal, at least one of a first current to one clock path of the pair of differential clock paths or a second current to another clock path of the pair of differential clock paths; and

quadrature divider circuitry coupled to an output of the duty cycle correction circuitry, wherein the quadrature divider circuitry generates an in-phase LO signal and a quadrature-phase LO signal from the pair of output clock signals at outputs of the duty cycle correction circuitry; and

in-phase, quadrature-phase (IQ) mixer circuitry coupled to the LO circuitry.

2. The frequency converter arrangement of claim 1 , wherein the coarse tuning circuitry adjusts the duty cycle of the pair of input clock signals to within a tuning range of the analog feedback circuit.

3. The frequency converter arrangement of claim 1 , wherein the analog feedback circuit adjusts the duty cycle of the pair of input clock signals using the analog output responsive to a duty cycle change in the pair of input clock signals represented by the analog signal generated from the output clock signals.

4. The frequency converter arrangement of claim 1 , wherein the analog feedback circuit comprises an analog integrator to provide the analog signal generated from the output clock signals.

5. The frequency converter arrangement of claim 4 , wherein the duty cycle correction circuitry further comprises:
a forward clock path comprising the analog output and the coarse tuning circuitry; and
a feedback clock path coupled to the forward clock path, the feedback clock path comprising the analog integrator.

6. The frequency converter arrangement of claim 5 , wherein:
the coarse tuning circuitry comprises a digital-to-analog converted (DAC) circuitry; and
the frequency converter arrangement further comprises a controller to:
vary, during a calibration phase, an input code to the DAC circuitry across a series of DAC codes;
monitor, during the calibration phase, a state of the analog feedback integrator circuitry responsive to the varying; and
calculate the digital calibration code responsive to the monitoring.

7. The frequency converter arrangement of claim 5 , wherein:
the forward clock path comprises the pair of differential clock paths, each coupled to one clock signal of the pair of input clock signals.

8. The frequency converter arrangement of claim 7 , wherein:
the analog integrator is configured to generate the analog feedback signal including duty cycle information of the pair of output clock signals.

9. The frequency converter arrangement of claim 7 , wherein the coarse tuning circuitry comprises a current steering digital-to-analog converter (DAC) coupled to the pair of differential clock paths, and wherein the current steering DAC steers, responsive to the digital calibration code, a current to one clock path of the pair of differential clock paths or to another clock path of the pair of differential clock paths.

Assignees

• Analog Devices International Unlimited Co

Inventors

• Fortier Justin L
• Angell Christopher W
• Mclaurin David J
• Burbano Oscar S
• Gheorghe Ionel
• Haroun Mostafa
• Zhou Xing

Classifications

• H03K23/40

  Gating or clocking signals applied to all stages, i.e. synchronous counters {(H03K23/74 - H03K23/84 take precedence)} · CPC title

• H04B1/0096

  where a full band is frequency converted into another full band · CPC title

• H03K21/40

  Monitoring; Error detection; Preventing or correcting improper counter operation · CPC title

• H04B1/0007

  wherein the AD/DA conversion occurs at radiofrequency or intermediate frequency stage · CPC title

• H03L7/193

  the frequency divider/counter comprising a commutable pre-divider, e.g. a two modulus divider · CPC title