Circuit board structure for mobile PCI express module

US12376220B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12376220-B2
Application numberUS-202218052802-A
CountryUS
Kind codeB2
Filing dateNov 4, 2022
Priority dateNov 10, 2021
Publication dateJul 29, 2025
Grant dateJul 29, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A circuit board structure for mobile PCI express module is applied to conform to PCI Express 4.0 specification. The circuit board structure includes a top signal layer and a bottom signal layer with a core and a conductive copper wire, a power supply layer disposed between the top signal layer and the bottom signal layer, a plurality of first insulating layers disposed between the top signal layer and the power supply layer and between the bottom signal layer and the power supply layer, and a plurality of second insulating layers disposed between the power supply layer and the first insulating layers. The dielectric loss values of the first insulating layer and the second insulating layer are between 0.004 and 0.014, and the length of the conductive cooper wire is between 500 and 2500 mil, so that the signal loss of the mobile PCI express module is less than 8 dB.

First claim

Opening claim text (preview).

What is claimed is: 1. A circuit board structure for mobile PCI express module applied to conform to PCI Express 4.0 specification, the circuit board structure for mobile PCI express module comprising: a top signal layer; a bottom signal layer, located on one side opposite to the top signal layer, wherein the top signal layer and the bottom signal layer both comprising a core and a conductive copper wire respectively, the conductive copper wire being configured on the surface of the core for signal transmission; at least one power supply layer, configured between the top signal layer and the bottom signal layer; a plurality of first insulating layers, configured between the top signal layer and the power supply layer and configured between the bottom signal layer and the power supply layer; and a plurality of second insulating layers, configured between the power supply layer and the first insulating layers; wherein, the dielectric loss values of the first insulating layers and the second insulating layers are between 0.004 and 0.014 and the length of the conductive copper wire is between 500 and 2500 mil, to reduce the signal loss of the mobile PCI express module less than 8 dB. 2. The circuit board structure for mobile PCI express module of claim 1 , further comprising a first ground layer, the first ground layer being configured between the top signal layer and the power supply layer and located between the first insulating layers and the second insulating layers. 3. The circuit board structure for mobile PCI express module of claim 2 , further comprising a first intermediate signal layer and a third ground layer configured between the top signal layer and the first ground layer, and the third ground layer being configured between the top signal layer and the first intermediate signal layer, the first insulating layers being located among the top signal layer, the third ground layer, the first intermediate signal layer and the first ground layer respectively. 4. The circuit board structure for mobile PCI express module of claim 1 , further comprising a second ground layer, the second ground layer being configured between the power supply layer and the bottom signal layer and located between the first insulating layers and the second insulating layers. 5. The circuit board structure for mobile PCI express module of claim 4 , further comprising a second intermediate signal layer and a fourth ground layer configured between the bottom signal layer and the second ground layer, and the fourth ground layer being configured between the bottom signal layer and the second intermediate signal layer, the first insulating layers being located among the bottom signal layer, the fourth ground layer, the second intermediate signal layer and the second ground layer respectively. 6. The circuit board structure for mobile PCI express module of claim 1 , wherein the top signal layer and the bottom signal layer comprises an impedance value respectively, and the impedance value is between 76.5 Ω and 93.5 Ω. 7. The circuit board structure for mobile PCI express module of claim 1 , wherein the conductive copper wire forms a plurality of arc-shaped wiring structures on the surface of the core. 8. The circuit board structure for mobile PCI express module of claim 1 , wherein the conductive copper wire is configured on the surface of the core in 10-degree trace. 9. The circuit board structure for mobile PCI express module of claim 1 , wherein the material of the first insulating layers is epoxy resin composite material, and the epoxy resin composite material comprises at least one of super low loss material and low loss material. 10. The circuit board structure for mobile PCI express module of claim 1 , wherein the thicknesses of the first insulating layers and the second insulating layers are between 0.05 mm and 0.08 mm.

Assignees

Inventors

Classifications

  • Printed elements for providing electric connections to or between printed circuits · CPC title

  • Reduction of cross-talk, noise or electromagnetic interference (grounding H05K1/0215) · CPC title

  • Multilayers with layers of different types · CPC title

  • Printed circuits associated with mounted high frequency components · CPC title

  • structurally associated with non-printed electric components (H05K1/16 takes precedence) · CPC title

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Frequently asked questions

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What does patent US12376220B2 cover?
A circuit board structure for mobile PCI express module is applied to conform to PCI Express 4.0 specification. The circuit board structure includes a top signal layer and a bottom signal layer with a core and a conductive copper wire, a power supply layer disposed between the top signal layer and the bottom signal layer, a plurality of first insulating layers disposed between the top signal la…
Who is the assignee on this patent?
Adlink Tech Inc
What technology area does this patent fall under?
Primary CPC classification H05K1/0218. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 29 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).