Tiled display

US12374668B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12374668-B2
Application numberUS-202217573619-A
CountryUS
Kind codeB2
Filing dateJan 11, 2022
Priority dateJan 12, 2021
Publication dateJul 29, 2025
Grant dateJul 29, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A tiled display includes a plurality of display devices, where a display area and a non-display area surrounding the display area are defined in each of the plurality of display devices, and a pad area is defined in the non-display area. The plurality of display devices includes a first display device and a second display device disposed adjacent to the first display device in a first direction, and the pad area of the first display device overlaps the display area of the second display device in a thickness direction.

First claim

Opening claim text (preview).

What is claimed is: 1. A tiled display comprising: a plurality of display devices, wherein a display area and a non-display area surrounding the display area are defined in each of the plurality of display devices, and a pad area is defined in the non-display area, wherein the plurality of display devices comprises a first display device and a second display device disposed adjacent to the first display device in a first direction, wherein the pad area of the first display device overlaps the display area of the second display device in a thickness direction, wherein each of the first display device and the second display device comprises a display element layer that is planar, wherein the display element layer of the first display device at least partially overlaps the display element layer of the second display device along the first direction, and wherein the first direction is perpendicular to the thickness direction, wherein the first display device comprises a substrate unit disposed across the display area and the non-display area, the display element layer of the first display device being disposed on the substrate unit in the display area, wherein the substrate unit comprises a first substrate and a second substrate disposed between the first substrate and the display element layer, and wherein the first substrate of the first display device overlaps the display element layer of the second display device along the thickness direction and the second substrate of the first display device does not overlap the display element layer of the second display device along the thickness direction. 2. The tiled display of claim 1 , wherein the non-display area is located on each of one side and an opposite side of each of the plurality of display devices, which are opposite to each other in the first direction, and wherein the non-display area located on the one side comprises the pad area, and a width of the non-display area located on the one side in the first direction is greater than a width of the non-display area located on the opposite side in the first direction. 3. The tiled display of claim 2 , wherein the first display device further comprises: a sealing member disposed across the display area and the non-display area to seal the display element layer; and a pad electrode disposed on the substrate unit in the pad area, wherein a side surface of the first substrate and a side surface of the second substrate, which are on a same side as each other, are not aligned with each other in a thickness direction. 4. The tiled display of claim 3 , wherein the side surface of the first substrate protrudes from the side surface of the second substrate in the first direction. 5. The tiled display of claim 4 , wherein the pad electrode is disposed on a part of an upper surface of the first substrate protruding from the second substrate in the first direction. 6. The tiled display of claim 5 , wherein the first display device further comprises a signal connection line electrically connecting the pad electrode to the display element layer, and wherein the signal connection line is disposed on the part of the upper surface of the first substrate protruding from the second substrate in the first direction, on the first side surface of the second substrate, and on an upper surface of the second substrate. 7. The tiled display of claim 3 , wherein the first display device further comprises a chip-on film electrically connected to the pad electrode, wherein a driver is disposed on the chip-on film, wherein the chip-on film includes one end overlapping the pad electrode in the thickness direction and an opposite end disposed under the first substrate, and wherein the first display device further comprises a printed circuit board connected to the opposite end of the chip-on film. 8. The tiled display of claim 1 , wherein the second display device comprises: a substrate unit disposed across the display area and the non-display area, the display element layer of the second display device being on the substrate unit of the second display device disposed in the display area; a sealing member disposed across the display area and the non-display area to seal the display element layer; and a pad electrode disposed on the substrate unit in the pad area, wherein the substrate unit of the second display device comprises a first substrate and a second substrate disposed between the first substrate of the second display device and the display element layer of the second display device, wherein a side surface of the first substrate of the second display device and a side surface of the second substrate of the second display device, which are on a same side as each other, are not aligned with each other in a thickness direction, and wherein the side surface of the second substrate of the second display device protrudes from the side surface of the first substrate of the second display device in the first direction. 9. The tiled display of claim 8 , wherein a part of the second substrate of the second display device protruding from the first substrate of the second display device in the first direction overlaps the pad electrode of the first display device in the thickness direction. 10. The tiled display of claim 9 , wherein a lower surface of the second substrate of the first display device and a lower surface of the second substrate of the second display device are not located at a same level as each other, and wherein the lower surface of the second substrate of the second display device is located higher than the lower surface of the second substrate of the first display device by a predetermined height. 11. The tiled display of claim 1 , wherein the display element layer of the first display device and the display element layer of the second display device are spaced apart along the first direction. 12. A tiled display comprising: a plurality of display devices, wherein a display area and a non-display area surrounding the display area are defined in each of the plurality of display devices, wherein the plurality of display devices comprises a first display device and a second display device located adjacent to the first display device in a first direction, wherein the non-display area is located on one side and an opposite side of each of the plurality of display devices, which are opposite to each other in the first direction, wherein a width of the non-display area located on the one side in the first direction is greater than a width of the non-display area located on the opposite side in the first direction, wherein the non-display area located on the one side of the first display device overlaps the display area of the second display device in a thickness direction, wherein the first display device comprises: a substrate unit disposed across the display area and the non-display area; a display element layer disposed on the substrate unit in the display area; a sealing member disposed across the display area and the non-display area to seal the display element layer; and a conductive pattern disposed on the substrate unit in the non-display area located on the one side thereof, wherein the substrate unit comprises a first substrate and a second substrate disposed between the first substrate and the display element layer, wherein a side surface of the first substrate and a side surface of the second substrate, which are on a same side as each other, are not aligned with each other in the thickness direction, wherein the side surface of the first substrate is inclined with respect to a lower surface of the first substrate, and the side s

Assignees

Inventors

Classifications

  • H10W90/00Primary

    Package configurations · CPC title

  • of interconnections · CPC title

  • of encapsulations · CPC title

  • H10H29/142Primary

    Two-dimensional arrangements, e.g. asymmetric LED layout · CPC title

  • Interconnections, e.g. lead-frames, bond wires or solder balls · CPC title

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What does patent US12374668B2 cover?
A tiled display includes a plurality of display devices, where a display area and a non-display area surrounding the display area are defined in each of the plurality of display devices, and a pad area is defined in the non-display area. The plurality of display devices includes a first display device and a second display device disposed adjacent to the first display device in a first direction…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 29 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).