Systems and methods for simulating a quantum processor

Patent metadata

Field	Value
Publication number	US-12373719-B2
Application number	US-202017617388-A
Country	US
Kind code	B2
Filing date	Jul 10, 2020
Priority date	Jul 12, 2019
Publication date	Jul 29, 2025
Grant date	Jul 29, 2025

Abstract

A digital processor simulates a quantum computing system by implementing a QPU model including a set of representation models and a device connectivity representation to simulate a quantum processor design or a physical quantum processor. The digital processor receives an analog waveform and generates a digital waveform representation comprising a set of waveform values that correspond to biases applied to programmable devices in a quantum processor. The digital processor selects a subset of waveform values based on channels in the device connectivity representation. The digital processor implements a representation model to compute a response based on the waveform values and a plurality of physical parameter values, the physical parameters characterizing a programmable device in a quantum processor. The device connectivity representation can be generated from a design implementation, validated against a set of rules, and adjusted to change the device connectivity representation until all of the rules are passed.

First claim

The invention claimed is:

1. A method of operation of at least one digital processor, the digital processor communicatively coupled to at least one server, the method comprising:
receiving an analog waveform from the at least one server;
generating a digital waveform representation for a set of programmable devices of a quantum processor topology based on the analog waveform, the quantum processor topology specifying a set of control lines by which biases can be applied to at least one of the set of programmable devices;
decomposing the digital waveform representation into a set of waveform values based on a device connectivity representation comprising a set of channels, each waveform value representing a bias applied to the at least one of the set of programmable devices;
identifying a subset of the set of channels in the device connectivity representation;
selecting a subset of the set of waveform values that correspond to the subset of the set of channels;
setting a plurality of physical parameter values characterizing at least one of the set of programmable devices of the quantum processor topology; and
computing a response via a representation model.

2. The method of claim 1 wherein receiving an analog waveform from the at least one server includes receiving an analog waveform from the at least one server, wherein the at least one server is communicatively coupled to a quantum processor.

3. The method of claim 1 wherein decomposing the digital waveform representation into a set of waveform values includes decomposing the digital waveform representation into a set of waveform values based on the set of channels in the device connectivity representation, the set of channels representing a number of communicative couplings of the set of programmable devices to a set of control lines in the quantum processor topology.

4. The method of claim 1 wherein identifying a subset of the set of channels in the device connectivity representation includes identifying a subset of the set of channels representing a subset of the set of programmable devices communicatively coupled to a subset of the set of control lines in the quantum processor topology.

5. The method of claim 1 wherein selecting a subset of the set of waveform values corresponding to the subset of the set of channels includes selecting a subset of the set of waveform values that each represent a bias to apply to one of: a respective qubit, and a respective coupler in the quantum processor topology.

6. The method of claim 1 wherein setting a plurality of physical parameter values characterizing at least one of the set of programmable devices in the quantum processor topology includes setting a plurality of physical parameter values for at least one of: a critical current, a body inductance, and a capacitance of a programmable device in a quantum processor topology.

7. The method of claim 1 wherein computing a response via a representation model includes computing a response based on the plurality of physical parameter values and the subset of the set of waveform values.

8. The method of claim 1 wherein the quantum processor topology is embodied in at least one physical instance of a physical quantum processor, and generating a digital waveform representation for a set of programmable devices of a quantum processor topology includes generating the digital waveform representation for the at least one physical instance of the physical quantum processor.

9. The method of claim 1 wherein the quantum processor topology is embodied in at least one non-physical instance of a theoretical quantum processor, and generating a digital waveform representation for a set of programmable devices of a quantum processor topology includes generating the digital waveform representation for the at least one non-physical instance of the theoretical quantum processor.

10. A system, the system comprising:
at least one digital processor communicatively coupled to at least one server; and
at least one non-transitory computer-readable storage medium communicatively coupled to the at least one digital processor and that stores processor-executable instructions which, when executed, causes the at least one digital processor to:
receive an analog waveform from the at least one server;
generate a digital waveform representation for a set of programmable devices of a quantum processor topology based on the analog waveform, the quantum processor topology specifying a set of control lines by which biases can be applied to at least one of the set of programmable devices;
decompose the digital waveform representation into a set of waveform values based on a device connectivity representation comprising a set of channels, each waveform value representing a bias applied to the at least one of the set of programmable devices;
identify a subset of the set of channels in the device connectivity representation;
select a subset of the set of waveform values that correspond to the subset of the set of channels;
set a plurality of physical parameter values characterizing at least one of the set of programmable devices of the quantum processor topology; and
compute a response via a representation.

11. The system of claim 10 , wherein
the at least one server is operable to generate a waveform based on a received Hamiltonian that characterizes or represents a problem, the at least one server communicatively coupled to at least one quantum processor.

12. A method of simulating a quantum processor, the quantum processor including a set of programmable devices communicatively coupled to a set of control lines, each one of the set of control lines operable to apply a bias to at least one of the set of programmable devices, the method executed by a digital processor, the method comprising:
generating a digital waveform representation;
decomposing the digital waveform representation into a set of waveform values based on a device connectivity representation comprising a set of channels;
identifying a subset of the set of channels in the device connectivity representation;
selecting a subset of the set of waveform values corresponding to the subset of the set of channels;
setting a plurality of physical parameter values characterizing at least one of the set of programmable devices of the quantum processor; and
computing a response via a representation model.

13. The method of claim 12 wherein generating a digital waveform representation includes generating a digital waveform representation based on an analog waveform received from a server coupled to a quantum processor.

14. The method of claim 12 wherein decomposing the digital waveform representation into a set of waveform values includes decomposing the digital waveform representation into a set of waveform values based on the set of channels in the device connectivity representation, the set of channels representing a number of communicative couplings of the set of programmable devices to a set of control lines in a quantum processor.

15. The method of claim 12 wherein identifying a subset of the set of channels in the device connectivity representation includes identifying a subset of the set of channels representing a subset of the set of programmable devices communicatively coupled to a subset of the set of control lines in a quantum processor.

16. The method of claim 12 wherein selecting a subset of the set of waveform values corresponding to the subset of the set of channels includes selecting a subset of the set of waveform values that each represent a bias applied to a respective programmable device in a q

Assignees

• D Wave Systems Inc

Inventors

• Johnson Mark W
• Reis Filho Mauricio
• Volkmann Mark H
• Perminov Ilya V
• Bunyk Paul I

Classifications

• G06J3/00

  Systems for conjoint operation of complete digital and complete analogue computers · CPC title

• G06F30/30 Primary

  Circuit design · CPC title

• G06F30/3308

  using simulation · CPC title

• G06N10/80

  Quantum programming, e.g. interfaces, languages or software-development kits for creating or handling programs capable of running on quantum computers; Platforms for simulating or accessing quantum computers, e.g. cloud-based quantum computing · CPC title

• G06N10/20 Primary

  Models of quantum computing, e.g. quantum circuits or universal quantum computers · CPC title