Method and device with memory access request processing

Patent metadata

Field	Value
Publication number	US-12373352-B2
Application number	US-202218073971-A
Country	US
Kind code	B2
Filing date	Dec 2, 2022
Priority date	Jan 20, 2022
Publication date	Jul 29, 2025
Grant date	Jul 29, 2025

Abstract

Embodiments may relate to processing an access request to a memory. The access request to the memory may be based on a first virtual memory address. If a first physical memory address corresponding to the first virtual memory address is determined to be not acquired (e.g., based on a page table), it may be determined whether the first virtual memory address is a valid address. If the first virtual memory address is a valid address, a target virtual memory space or a target physical memory space for the access request may be allocated based on a free memory pool for the target kernel. The free memory pool may include currently allocated virtual and/or physical memory. The access request may be processed based on the allocated target virtual memory space or target physical memory space.

First claim

What is claimed is:

1. A method of processing an access request to a memory, which is performed in association with execution of a kernel of a computing device, the method comprising:
receiving the access request to the memory based on a first virtual memory address;
determining whether a first physical memory address corresponding to the first virtual memory address is acquired based on a page table;
determining, in response to determining that the first physical memory address corresponding to the first virtual memory address is not acquired, whether the first virtual memory address is a valid address;
allocating, in response to determining that the first virtual memory address being is a valid address, at least one of a target virtual memory space and a target physical memory space for the access request based on a free memory pool for the kernel, the free memory pool is configured to comprise at least one of a page of a virtual memory space or a subpage of the page that is not currently used by a process, the allocating comprising:
allocating full frames of physical memory and associating the full frames with respective full virtual pages of a virtual memory space;
allocating partial frames of the physical memory and associating the partial frames with respective partial pages of the virtual memory address space; and
including partial frames and/or partial pages in the free memory pool, wherein the target virtual memory space or the target physical memory space comprises a partial frame and/or a partial page; and

processing the access request based on the allocated target virtual memory space or target physical memory space.

2. The method of claim 1 , further comprising:
determining whether a translation lookaside buffer (TLB) miss for the first virtual memory address occurs based on a TLB associating virtual memory addresses with physical memory addresses,
wherein the determining whether the first physical memory address corresponding to the first virtual memory address is acquired is performed in response to determining that a TLB miss has occurred.

3. The method of claim 1 , further comprising:
in response to determining that the first physical memory address corresponding to the first virtual memory address has been acquired, processing the access request based on the first physical memory address.

4. The method of claim 1 , wherein the determining of whether the first virtual memory address is a valid address comprises:
determining whether the first virtual memory address is an address in a virtual memory area allocated to the kernel.

5. The method of claim 1 , wherein the free memory pool comprises at least one subpage, the subpage being smaller than the page.

6. The method of claim 5 , wherein the allocating comprises allocating a physical memory subframe corresponding to the subpage.

7. The method of claim 1 , wherein the free memory pool comprises at least the page and the subpage, the subpage being smaller than the page.

8. The method of claim 1 , further comprising:
determining, in response to the first virtual memory address being an invalid address, whether the first virtual memory address is an area accessible to the kernel; and
allocating, in response to the first virtual memory address being the area accessible to the kernel, a target virtual memory space and a target physical memory space for the access request based on the free memory pool.

9. The method of claim 1 , further comprising:
updating flag information on one or more pages of the target virtual memory space, wherein the flag information causes subpages of the one or more pages of the target virtual memory space to be managed with respect to the free memory pool.

10. The method of claim 1 , wherein the access request comprises a memory allocation request, and wherein the allocating the virtual memory space or the physical memory space is based on flag information received through the memory allocation request.

11. The method of claim 1 , wherein the computing device comprises a central processing unit (CPU) comprising a plurality of cores, and wherein at least one of the cores is allocated for the kernel.

12. The method of claim 1 , wherein the kernel comprises an auxiliary kernel executed by a main kernel.

13. The method of claim 1 , wherein the kernel is booted based on an application or program executed by the computing device, and
for the kernel, at least a portion of cores of the computing device and at least a portion of a memory area of the computing device is allocated to the kernel.

14. A non-transitory computer-readable recording medium comprising instructions configured to cause a computing device to perform the method of claim 1 .

15. A computing device comprising:
a processor; and
a memory storing instructions configured to cause the processor to process an access request to a memory and:
receive an access request to a memory based on a first virtual memory address;
determine whether a first physical memory address corresponding to the first virtual memory address is in a page table;
determine, in response to determining that the first physical memory address corresponding to the first virtual memory address is not acquired, whether the first virtual memory address is a valid address; and
for the access request, in response to determining that the first virtual memory address is a valid address, allocate at least one of a target virtual memory space and a target physical memory space from a free memory pool, the free memory pool comprises at least one of a page of a virtual memory space or a subpage of the page that is not currently used by a process, the allocation comprising:
allocation of full frames of physical memory and associate the full frames with respective full virtual pages of a virtual memory space;
allocation of partial frames of the physical memory and associate the partial frames with respective partial pages of the virtual memory address space; and

includes partial frames and/or partial pages in the free memory pool, wherein the target virtual memory space or the target physical memory space comprises a partial frame and/or a partial page.

16. The computing device of claim 15 , wherein the processor comprises a core allocated to the kernel from among a plurality of cores of the computing device.

17. The computing device of claim 15 , wherein the target physical memory space is a portion of an entire storage space of a random-access memory (RAM) of the computing device.

18. The computing device of claim 15 , wherein the allocating is performed based on a page fault.

19. The computing device of claim 18 , wherein the page fault corresponds to a physical frame not having been allocated for the first virtual memory address.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Ryu Dong-Uk
• Lee Jaewon

Classifications

• G06F12/1027 Primary

  using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] · CPC title

• G06F2212/1024

  Latency reduction · CPC title

• G06F2212/50

  Control mechanisms for virtual memory, cache or TLB · CPC title

• G06F3/0631

  by allocating resources to storage systems · CPC title

• G06F12/023

  Free address space management · CPC title