Technologies for accelerated HTTP processing with hardware acceleration

US12368767B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12368767-B2
Application numberUS-202318202408-A
CountryUS
Kind codeB2
Filing dateMay 26, 2023
Priority dateMar 16, 2018
Publication dateJul 22, 2025
Grant dateJul 22, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Technologies for accelerated HTTP message processing include a computing device having a network controller. The computing device may generate an HTTP message, frame the HTTP message to generate a transport protocol packet such as a TCP/IP packet or QUIC packet, and pass the transport protocol packet to the network controller. The network controller compresses the HTTP header of the HTTP message, encrypts the compressed HTTP message, and transmits the encrypted message to a remote device. The network controller may segment the transport protocol packet into multiple segmented packets. The network controller may receive transport protocol packets that include encrypted HTTP message. The network controller decrypts the encrypted HTTP message to generate a compressed HTTP message, decompresses the HTTP message, and steers the HTTP message to a receive queue based on contents of an HTTP header. The network controller may coalesce multiple transport protocol packets. Other embodiments are described and claimed.

First claim

Opening claim text (preview).

The invention claimed is: 1. A computing device comprising: a network interface controller comprising circuitry to: receive a packet having at least one packet header; generate a decrypted packet header of the packet header of the packet; and select a receive queue of multiple receive queues associated with multiple respective processor cores based, at least in part, on Hypertext Transport Protocol (HTTP) action data and/or HTTP object data in the decrypted packet header; wherein: the selected receive queue is to be used in association with packet data steering. 2. The computing device of claim 1 , wherein the decrypted packet header is an HTTP header. 3. The computing device of claim 1 , wherein the decrypted packet header is generated using an encryption key associated with a Secure Sockets Layer (SSL) connection. 4. The computing device of claim 1 , wherein the decrypted packet header is generated using an encryption key associated with a TLS (Transport Layer Security) connection. 5. The computing device of claim 1 , wherein the receive queue is selected based on hash-based spreading, the hash-based spreading to spread received packets among processor cores based on decrypted HTTP headers. 6. The computing device of claim 1 , wherein the at least one packet header is included in a transport protocol packet. 7. The computing device of claim 1 , wherein the packet header is an encrypted packet header. 8. The computing device of claim 1 , wherein: the packet header is in accordance with QUIC (Quick User Datagram Protocol Internet Connections) protocol; and the packet header is to be compressed, at least in part, using QPACK compression algorithm. 9. A method comprising: receiving, by a network interface controller, a packet having at least one packet header; generating, by the network interface controller, a decrypted packet header of the packet header of the packet; and selecting, by the network interface controller, a receive queue of multiple receive queues associated with multiple respective processor cores based, at least in part, on Hypertext Transport Protocol (HTTP) action data and/or HTTP object data in the decrypted packet header; wherein: the selected receive queue is to be used in association with packet data steering. 10. The method of claim 9 , wherein the decrypted packet header is an HTTP header. 11. The method of claim 9 , wherein the decrypted packet header is generated using an encryption key associated with a Secure Sockets Layer (SSL) connection. 12. The method of claim 9 , wherein the decrypted packet header is generated using an encryption key associated with a TLS (Transport Layer Security) connection. 13. The method of claim 9 , wherein the receive queue is selected based on hash-based spreading, the hash-based spreading to spread received packets among processor cores based on decrypted HTTP headers. 14. The method of claim 9 , wherein the at least one packet header is included in a transport protocol packet. 15. The method of claim 9 , wherein: the packet header is in accordance with QUIC (Quick User Datagram Protocol Internet Connections) protocol; and the packet header is to be compressed, at least in part, using QPACK compression algorithm. 16. A system comprising: a plurality of processor cores; and a network interface controller comprising circuitry to: receive a packet having at least one packet header; generate a decrypted packet header of the packet header of the packet; and select a receive queue of multiple receive queues associated with multiple respective processor cores based, at least in part, on Hypertext Transport Protocol (HTTP) action data and/or HTTP object data in the decrypted packet header; wherein: the selected receive queue is to be used in association with packet data steering. 17. The system of claim 16 , wherein the decrypted packet header is an HTTP header. 18. The system of claim 16 , wherein the decrypted packet header is generated using an encryption key associated with a Secure Sockets Layer (SSL) connection. 19. The system of claim 16 , wherein the decrypted packet header is generated using an encryption key associated with a TLS (Transport Layer Security) connection. 20. The system of claim 16 , wherein the receive queue is selected based on hash-based spreading, the hash-based spreading to spread received packets among processor cores based on decrypted HTTP headers. 21. The system of claim 16 , wherein the at least one packet header is included in a transport protocol packet. 22. The system of claim 16 , wherein: the packet header is in accordance with QUIC (Quick User Datagram Protocol Internet Connections) protocol; and the packet header is to be compressed, at least in part, using QPACK compression algorithm.

Assignees

Inventors

Classifications

  • Networking architectures for enhanced packet encryption processing, e.g. offloading of IPsec packet processing or efficient security association look-up · CPC title

  • Adaptation or special uses of UDP protocol · CPC title

  • IP fragmentation; TCP segmentation · CPC title

  • wherein the data content is protected, e.g. by encrypting or encapsulating the payload · CPC title

  • Protocols for data compression, e.g. ROHC · CPC title

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What does patent US12368767B2 cover?
Technologies for accelerated HTTP message processing include a computing device having a network controller. The computing device may generate an HTTP message, frame the HTTP message to generate a transport protocol packet such as a TCP/IP packet or QUIC packet, and pass the transport protocol packet to the network controller. The network controller compresses the HTTP header of the HTTP messag…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification H04L67/02. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 22 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).