Power input circuit for isolation under supply short circuit condition

Patent metadata

Field	Value
Publication number	US-12368295-B2
Application number	US-201916539202-A
Country	US
Kind code	B2
Filing date	Aug 13, 2019
Priority date	Aug 14, 2018
Publication date	Jul 22, 2025
Grant date	Jul 22, 2025

Abstract

Improvements to a power input circuit of an electric motor drive system are provided. The power input circuit is provided between a power source (e.g., battery), and a load (e.g., an inverter and a motor in the electric motor drive system). The power input circuit can comprise controllable switches for reverse polarity protection and isolation of the inverter under supply short circuit condition. In addition, an improvement to a power input circuit can comprise connection of a power supply (e.g., voltage regulator) to the external power source input side of a reverse polarity protection circuit in the power input circuit to mitigate against microcontroller restart from post-failure shutdown condition. Connection of a low-power diode in series with the voltage regulator also provides for reverse polarity protection.

First claim

The invention claimed is:

1. A power input circuit connected between a power source and a motor in an electric motor drive system, the power input circuit comprising:
a first switch disposed between the power source and a load comprising the motor, the first switch configured to provide reverse polarity protection from the power source; and
a second switch connected to the first switch, the second switch having a voltage needed for activation to open from being closed, the second switch being configured to open and prevent activation of the first switch to close and conduct power from the power source to the load when the first switch is open during a reverse polarity condition of the power source, and to isolate the first switch from activation to close due to a load side generated voltage during a short circuit condition of the power source, when the load side generated voltage reaches the voltage needed for activation of the second switch to open.

2. The power input circuit of claim 1 , wherein the first switch and the second switch are each selected from the group consisting of a metal oxide semiconductor field effect transistor (MOSFET), a bipolar junction transistor (BJT), an insulated-gate bipolar transistor (IGBT), or a thyristor.

3. The power input circuit of claim 2 , wherein the first switch is disposed in a direct current (DC) bus return path of the power source and is configured to be closed when a positive terminal of the power source is connected to a DC bus supply path of the power source, and be open when a negative terminal of the power source is connected to the DC bus supply path, to provide reverse polarity protection;
wherein the second switch is connected between the first switch and the load and configured to be closed when the first switch is closed, and to be open when the first switch is open and when a positive voltage is received from the load; and
wherein the first switch is selected from the group consisting of a n-channel MOSFET (nMOS), a NPN type BJT, a n-channel type IGBT, or a n-channel type thyristor, and the second switch is selected from the group consisting of p-channel MOSFET (pMOS), a PNP type BJT, a p-channel type IBGT, or a p-channel type thyristor.

4. The power input circuit of claim 3 , wherein the first switch is a nMOS type MOSFET having a drain terminal connected to a DC bus return path, a source terminal connected to ground and a gate terminal connected to a gate resistor and controlled by the second switch, and the second switch is a pMOS type MOSFET having a drain terminal connected to the gate terminal of the first switch, a source terminal connected to the DC bus supply path and a gate terminal connected to the DC bus return path.

5. The power input circuit of claim 4 , further comprising a resistor connected between the gate terminal and the source terminal of the first switch.

6. The power input circuit of claim 4 , further comprising a first resistor connected between the gate terminal and the source terminal of the second switch, and a second resistor connected between the gate terminal of the second switch and the DC bus return path, wherein the second resistor has larger resistance than resistance of the first resistor.

7. The power input circuit of claim 2 , wherein the first switch is disposed in a direct current (DC) bus supply path of the power source and is configured to be closed when a positive terminal of the power source is connected to the DC bus supply path, and be open when a negative terminal of the power source is connected to the DC bus supply path, to provide reverse polarity protection;
wherein the second switch is connected between the first switch and ground and configured to be closed when the first switch is closed, and to be open to isolate the first switch from ground when a power source fault occurs; and
wherein the first switch is selected from the group consisting of p-channel MOSFET (pMOS), a PNP type BJT, a p-channel type IGBT, or a p-channel type thyristor, and the second switch is selected from the group consisting of n-channel MOSFET (nMOS), a NPN type BJT, a n-channel type IGBT, or a n-channel type thyristor.

8. The power input circuit of claim 7 , wherein the first switch is a a pMOS type MOSFET having a drain terminal connected to a DC bus supply path, a source terminal connected to a bulk capacitor, and a gate terminal controlled by the second switch and connected to a gate resistor, and the second switch is a nMOS type MOSFET having a drain terminal connected to the gate resistor of the first switch, a source terminal connected to ground and a gate terminal connected to the DC bus supply path.

9. The power input circuit of claim 8 , further comprising a resistor connected between the gate terminal and the source terminal of the first switch.

10. The power input circuit of claim 8 , further comprising a first resistor connected between the gate terminal and the source terminal of the second switch, and a second resistor connected between the gate terminal of the second switch and the DC bus supply path, wherein the first resistor has larger resistance than resistance of the second resistor.

11. A power input circuit connected between a power source and a motor in an electric motor drive system, the power input circuit comprising:
a first switch disposed between the power source and a load comprising the motor, the first switch configured to provide reverse polarity protection from the power source; and
a second switch connected to the first switch and configured to prevent activation of the first switch to close and conduct power from the power source to the load during a reverse polarity condition of the power source, and to isolate the first switch from activation due to a load side generated voltage during a short circuit condition of the power source;
wherein the first switch is disposed in a direct current (DC) bus return path of the power source and is configured to be closed when a positive terminal of the power source is connected to a DC bus supply path of the power source, and be open when a negative terminal of the power source is connected to the DC bus supply path, to provide reverse polarity protection;
wherein the second switch is connected between the first switch and the load and configured to be closed when the first switch is closed, and to be open when the first switch is open and when a positive voltage is received from the load;
wherein the first switch is a n-channel metal oxide semiconductor field effect transistor (nMOS) having a drain terminal connected to a DC bus return path, a source terminal connected to ground and a gate terminal connected to a gate resistor and controlled by the second switch, and the second switch is a p-channel metal oxide semiconductor field effect transistor (pMOS) having a drain terminal connected to the gate terminal of the first switch, a source terminal connected to the DC bus supply path and a gate terminal connected to the DC bus return path, the second switch remaining open when the first switch is open from the connection of the negative terminal of the power source to the DC bus supply path during a fault condition, and when a positive voltage is received from the load and causes the source terminal voltage of the pMOS to be the same as the gate terminal voltage of the pMOS.

Assignees

• Steering Solutions Ip Holding

Inventors

• Pramod Prerit
• Kolli Nithin
• Saha Aparna
• Lowe Infane O

Classifications

• H02P27/06

  using DC to AC converters or inverters (H02P27/05 takes precedence) · CPC title

• H02H11/002

  in case of inverted polarity or connection; with switching for obtaining correct connection · CPC title

• B62D5/0481

  monitoring the steering system, e.g. failures · CPC title

• B62D5/0463

  calculating assisting torque from the motor based on driver input · CPC title

• H02H7/0833 Primary

  for electric motors with control arrangements · CPC title