Frequency-dependent ground fault circuit interrupter

US12368294B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12368294-B2
Application numberUS-202318450224-A
CountryUS
Kind codeB2
Filing dateAug 15, 2023
Priority dateSep 8, 2022
Publication dateJul 22, 2025
Grant dateJul 22, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Illustrative GFCI devices and methods maintain safety while reducing the risk of unnecessary interruptions. One illustrative GFCI circuit includes: a first operational amplifier configured to couple to a first current transformer that senses a net current through multiple power conductors, the first operational amplifier configured to convert a signal current from a signal terminal of the first current transformer to a signal voltage, the signal voltage having an inverse dependence on frequency; an analog to digital converter configured to provide samples of the signal voltage; and a controller configured to interrupt at least one of the multiple power conductors when an magnitude measurement derived from the samples exceeds a frequency-independent and/or phase-independent threshold a predetermined number of times or for a predetermined time period.

First claim

Opening claim text (preview).

The invention claimed is: 1. A circuit that comprises: a current-to-voltage converter configured to receive a signal current from a first current transformer that senses a net current through multiple power conductors, the current-to-voltage converter configured to convert the signal current to a signal voltage, the signal voltage having a magnitude that decreases as frequency increases; an analog to digital converter configured to provide samples of the signal voltage; and a controller configured to interrupt at least one of the multiple power conductors when a magnitude measurement derived from the samples exceeds a frequency-independent and/or phase-independent threshold for a predetermined time period or for a predetermined number of times. 2. The circuit of claim 1 , wherein the signal voltage is representable as v = i ⁢ ( a b + f ) where a and b are positive constants, f is frequency, and i is the signal current. 3. The circuit of claim 2 , wherein b has a value of about 1754.5. 4. The circuit of claim 1 , wherein the magnitude measurement is based on a percentage of time that the samples exceed a baseline value. 5. The circuit of claim 1 , wherein as part of interrupting the at least one of the multiple power conductors, the controller is configured to provide a pre-interrupt delay that depends on the magnitude measurement. 6. The circuit of claim 1 , wherein the current-to-voltage converter is a first operational amplifier, and wherein the circuit further comprises: a second operational amplifier configured to couple to a bias terminal of the first current transformer and configured to eliminate any DC voltage difference between the bias terminal and a signal terminal of the first current transformer. 7. The circuit of claim 6 , wherein the second operational amplifier is configured as a chopper amplifier. 8. The circuit of claim 1 , further comprising: a third operational amplifier configured to couple to a second current transformer to induce an opposing current relative to the first current transformer, the controller configured to enable the third operational amplifier to test for a ground neutral fault when a signal voltage frequency is within a predetermined range. 9. A method that comprises: receiving a signal current from a current transformer configured to sense a net current through multiple power conductors; converting the signal current into a frequency-dependent signal voltage, the frequency-dependent signal voltage being smaller for higher frequencies than for lower frequencies; deriving a magnitude measurement from the signal voltage; and interrupting at least one of the multiple power conductors when the magnitude measurement exceeds a frequency-independent and/or phase-independent threshold for a predetermined period of time or a predetermined number of times. 10. The method of claim 9 , wherein the signal voltage is representable as v = i ⁢ ( a b + f ) where a and b are positive constants, f is frequency, and i is the signal current. 11. The method of claim 10 , wherein b has a value of about 1754.5. 12. The method of claim 9 , wherein said deriving the magnitude measurement includes: measuring a percentage of time that the signal voltage exceeds a baseline value. 13. The method of claim 9 , wherein said interrupting at least one of the multiple power conductors includes providing a pre-interrupt delay that depends on the magnitude measurement. 14. The method of claim 9 , further comprising biasing the current transformer with a chopper amplifier. 15. The method of claim 9 , further comprising: testing for a ground neutral fault if the signal voltage has a frequency within a predetermined range, said interrupting at least one of the multiple power conductors being performed based on whether a ground neutral fault is detected. 16. A circuit that comprises: an operational amplifier having an inverting input coupled to a current transformer configured to sense a net current through multiple power conductors, the operational amplifier having an output coupled to the inverting input via a feedback impedance that decreases with frequency; a comparator configured to produce a comparator signal indicating when the output of the operational amplifier exceeds a frequency-independent value; a controller configured to compare measure a percentage of time that the comparator signal is asserted, the percentage measurement representing a magnitude of the output of the operational amplifier, the controller further configured to assert an interrupt signal when the percentage measurement indicates a ground fault; and a relay configured to interrupt at least one of the multiple power conductors when the interrupt signal is asserted. 17. The circuit of claim 16 , wherein the feedback impedance is representable as Z = a b + f , where a and b are positive constants and f is frequency. 18. The circuit of claim 16 , wherein the controller is configured to provide a pre-interrupt delay that depends on the percentage measurement. 19. The circuit of claim 16 , wherein the controller is configured to test for a ground neutral fault using a third operational amplifier configured to couple to a second current transformer to induce an opposing current relative to the first current transformer which will produce an oscillating signal at the output of the third operational amplifier, and is configured to interrupt at least one of the multiple power conductors if the oscillating signal has a frequency within a predetermined range.

Assignees

Inventors

Classifications

  • Testing for short-circuits, leakage current or ground faults · CPC title

  • responsive to undesired approach to, or touching of, live parts by living beings · CPC title

  • responsive to earthing of the neutral conductor (H02H3/338 takes precedence) · CPC title

  • H02H3/16Primary

    responsive to fault current to earth, frame or mass (with balanced or differential arrangement H02H3/26 {; monitoring earth connection H02H5/105}) · CPC title

  • H02H3/33Primary

    using summation current transformers (H02H3/347 takes precedence) · CPC title

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What does patent US12368294B2 cover?
Illustrative GFCI devices and methods maintain safety while reducing the risk of unnecessary interruptions. One illustrative GFCI circuit includes: a first operational amplifier configured to couple to a first current transformer that senses a net current through multiple power conductors, the first operational amplifier configured to convert a signal current from a signal terminal of the first…
Who is the assignee on this patent?
Semiconductor Components Ind Llc
What technology area does this patent fall under?
Primary CPC classification H02H3/16. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 22 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).