Spin hall device, method for obtaining hall voltage, and max pooling method

Patent metadata

Field	Value
Publication number	US-12366593-B2
Application number	US-202217942246-A
Country	US
Kind code	B2
Filing date	Sep 12, 2022
Priority date	Oct 27, 2021
Publication date	Jul 22, 2025
Grant date	Jul 22, 2025

Abstract

The present application discloses a spin Hall device, a method for obtaining a Hall voltage, and a max pooling method. The spin Hall device includes a cobalt ferroboron layer. A top view and a bottom view of the spin Hall device are completely the same as a cross-shaped graph that has two axes of symmetry perpendicular to each other and equally divided by each other. The spin Hall device of the present application has non-volatility and analog polymorphic characteristics, can be used for obtaining a Hall voltage and applied to various circuits, is simple in structure and small in size, can save on-chip resources, and can meet computation requirements.

First claim

The invention claimed is:

1. A method for obtaining a Hall voltage, implemented by a spin Hall device, the spin Hall device comprising a cobalt ferroboron layer, wherein a top view and a bottom view of the spin Hall device are completely the same as a cross-shaped graph that has two axes of symmetry perpendicular to each other and equally divided by each other, the two axes of symmetry being a first axis of symmetry and a second axis of symmetry, the method comprising:
applying at least one drive current to one end of the first axis of symmetry, wherein the drive current is greater than an initial drive current and less than a saturated drive current, the initial drive current is a current when the Hall voltage of the spin Hall device starts to change, and the saturated drive current is a current when the Hall voltage of the spin Hall device is saturated; and
reading the at least one drive current with the same read current, and obtaining a Hall voltage across the second axis of symmetry until all the drive currents are read out to obtain a Hall voltage corresponding to a max drive current in the at least one drive current.

2. A method for max pooling of multiple input data, comprising:
converting the input data into a drive current; and
executing the method for obtaining a Hall voltage according to claim 1 , wherein the Hall voltage corresponding to the max drive current corresponds to max data among the multiple input data, and the max data is the result of max pooling.

3. A device for max pooling of multiple input data, comprising: a digital-to-analog converter and a spin Hall device, wherein
the digital-to-analog converter is configured to convert the input data into a drive current; and
the spin Hall device is configured to execute the method for obtaining a Hall voltage according to claim 1 , wherein the Hall voltage corresponding to the max drive current corresponds to max data among the multiple input data, and the max data is the result of max pooling.

4. The method according to claim 1 , wherein the spin Hall device comprising: a substrate layer, a tungsten layer, the cobalt ferroboron layer, a magnesium oxide layer, a tantalum layer, and a ruthenium layer, which are stacked from bottom to top in sequence.

5. The method according to claim 4 , wherein the tungsten layer has a thickness of 2-5 nm; the cobalt ferroboron layer has a thickness of 1-1.5 nm; the magnesium oxide layer has a thickness of 1.5-2.5 nm; and the tantalum layer and the ruthenium layer have a total thickness of 1-10 nm.

6. A system for max pooling of multiple input data, comprising: a spin Hall device, a microprocessor, and a random access memory, a digital-to-analog converter and an analog-to-digital converter respectively connected to the microprocessor, wherein the random access memory, the digital-to-analog converter, the spin Hall device, the analog-to-digital converter, and the microprocessor are connected in sequence;
the microprocessor is configured to control the digital-to-analog converter and the analog-to-digital converter;
the digital-to-analog converter is configured to convert the input data into an analog current;
the spin Hall device is configured to receive the analog current, and obtain a Hall voltage corresponding to a max current in the analog current;
the analog-to-digital converter is configured to convert the Hall voltage corresponding to the max current into a digital quantity;
the microprocessor is further configured to receive the digital quantity; and
the spin Hall device comprising a cobalt ferroboron layer, wherein a top view and a bottom view of the spin Hall device are completely the same as a cross-shaped graph that has two axes of symmetry perpendicular to each other and equally divided by each other.

7. The system according to claim 6 , wherein the analog current is used as the drive current.

8. The system according to claim 6 , further comprising: an operational amplifier and a filter, wherein the spin Hall device, the operational amplifier, the filter, and the analog-to-digital converter are connected in sequence;
the spin Hall device is configured to receive the analog current, and obtain a Hall voltage corresponding to a max current in the analog current;
the operational amplifier is configured to amplify the Hall voltage corresponding to the max current to obtain an amplified Hall voltage;
the filter is configured to filter the amplified Hall voltage to obtain a filtered Hall voltage; and
the analog-to-digital converter is configured to convert the filtered Hall voltage into a digital quantity.

9. The system according to claim 6 , further comprising: a random access memory respectively connected to the microprocessor and the digital-to-analog converter, wherein
the microprocessor is further configured to control the random access memory; and the random access memory is configured to receive and store the input data.

10. An analog computation neural network acceleration system, comprising a 1T1R crossbar array, a spin Hall device, an analog-to-digital converter, and a microprocessor, wherein comprising a cobalt ferroboron layer, wherein a top view and a bottom view of the spin Hall device are completely the same as a cross-shaped graph that has two axes of symmetry perpendicular to each other and equally divided by each other;
the 1T1R crossbar array is configured to multiply and accumulate convolution computations by Kirchhoff's law under the control of the microprocessor to obtain multiply-accumulate data;
the spin Hall device is configured to process the multiply-accumulate data to obtain a Hall voltage;
the analog-to-digital converter is configured to convert the Hall voltage into a digital signal under the control of the microprocessor; and
the microprocessor is configured to receive the digital signal;
the analog computation neural network acceleration system further comprising: a power amplifier, an operational amplifier, a filter, and a low dropout linear regulator, wherein the 1T1R crossbar array, the power amplifier, the spin Hall device, the operational amplifier, the filter, the analog-to-digital converter, and the microprocessor are connected in sequence;
the power amplifier is configured to amplify an electrical signal of the multiply-accumulate data to obtain an amplified electrical signal;
the spin Hall device is configured to process the amplified electrical signal to obtain a Hall voltage;
the operational amplifier is configured to amplify the Hall voltage to obtain an amplified Hall voltage;
the filter is configured to filter the amplified Hall voltage to obtain a filtered Hall voltage; and
the analog-to-digital converter is configured to convert the filtered Hall voltage into a digital signal under the control of the microprocessor.

11. An analog computation neural network acceleration method, implemented by the analog computation neural network acceleration system according to claim 10 ,
the analog computation neural network acceleration method comprising:
multiplying and accumulating, by the 1T1R crossbar array, convolution computations by Kirchhoff's law under the control of the microprocessor to obtain multiply-accumulate data;
processing, by the spin Hall device, the multiply-accumulate data to obtain a Hall voltage;
converting, by the analog-to-digital converter, the Hall voltage into a digital signal under the control of the microprocessor; and
receiving, by the microprocessor, the digital signal.

12. An analog computation neural network acceleration method, implemented by the analog computation neural network acceleration system according to claim 10 ,
the analog computation neural network accel

Assignees

• Inst Of Microelectronics Cas

Inventors

• Cui Yan
• Luo Jun
• Yang Meiyin
• Xu Jing

Classifications

• G06N3/0464

  Convolutional networks [CNN, ConvNet] · CPC title

• G01R33/093

  using multilayer structures, e.g. giant magnetoresistance sensors (thin magnetic films H01F10/00) · CPC title

• G01R33/07

  Hall effect devices · CPC title

• G01R19/30 Primary

  Measuring the maximum or the minimum value of current or voltage reached in a time interval (G01R19/04 takes precedence) · CPC title

• G01R19/25

  using digital measurement techniques · CPC title