Processor with an elliptic curve cryptographic algorithm and a data processing method thereof

Patent metadata

Field	Value
Publication number	US-12362944-B2
Application number	US-202217837607-A
Country	US
Kind code	B2
Filing date	Jun 10, 2022
Priority date	Sep 1, 2021
Publication date	Jul 15, 2025
Grant date	Jul 15, 2025

Abstract

A processor with an elliptic curve cryptographic algorithm and a data processing method thereof are shown. The processor has first register storing a Hash value pointer, and a second register, storing a private key pointer. In response to a first elliptic curve cryptographic instruction of an instruction set architecture, the processor reads a first storage space within a system memory by referring to the first register to get a Hash value of the data to be signed, reads a private key by referring to the second register, performs a signature procedure using the elliptic curve cryptographic algorithm on the Hash value based on the private key to generate a digital signature, and programs the digital signature into a second storage space within the system memory.

First claim

What is claimed is:

1. A processor with an elliptic curve cryptographic algorithm, comprising:
a cryptographic unit, including an elliptic curve cryptographic acceleration engine;
a set of architectural registers, including a first register and a second register, wherein, for execution of a first elliptic curve cryptographic instruction, the first register stores a Hash value pointer pointing to a first storage space within a system memory, a Hash value of data to be signed is stored in the first storage space, and the second register stores a private key pointer pointing to a private key of a signer;
a microcode storage device, storing microcode; and
a decoder, generating a plurality of microinstructions based on the microcode in response to the first elliptic curve cryptographic instruction;
wherein, in response to the first elliptic curve cryptographic instruction of an instruction set architecture, the processor reads the Hash value of the data to be signed from the first storage space by referring to the first register, reads the private key by referring to the second register, performs a signature procedure using the elliptic curve cryptographic algorithm on the Hash value based on the private key to generate a digital signature, and programs the digital signature into a second storage space within the system memory;
the elliptic curve cryptographic acceleration engine includes hardware for point multiplication that receives an elliptic curve input point and a big number input to generate an elliptic curve output point;
the microinstructions decoded from the first elliptic curve cryptographic instruction includes a point multiplication microinstruction;
in response to the point multiplication microinstruction, the hardware for point multiplication performs a calculation, (x 1 , y 1 )=[k]G, where k is a random number used as the big number input, G is an elliptic curve base point used as the elliptic curve input point, and (x 1 , y 1 ) is the elliptic curve output point generated by the hardware for point multiplication;
according to the microinstructions, the processor performs calculation, r=(e+x 1 )mod n, wherein e is the Hash value, n is the order of G, and r is calculated to form the digital signature;
according to the microinstructions, the processor determines whether r is zero and whether r+k is n; and
according to the microinstructions, if r is zero or r+k is n, the random number is renewed and the point multiplication microinstruction is executed again,
wherein:
prior to the first elliptic curve cryptographic instruction, the processor executes a second elliptic curve cryptographic instruction;
for execution of the second elliptic curve cryptographic instruction, the first register stores a user identification code pointer and the second register stores a public key pointer, the user identification code pointer points to a fourth storage space within the system memory that stores a user identification code, and the public key pointer points to a public key; and
in response to the second elliptic curve cryptographic instruction, the processor reads the user identification code from the fourth storage space by referring to the first register, reads the public key by referring to the second register, performs a first preprocessing procedure using the elliptic curve cryptographic algorithm on the user identification code and a user identification code length based on the public key to generate a preprocessed Hash value, and programs the preprocessed Hash value into a fifth storage space within the system memory to be converted into the Hash value for execution of the first elliptic curve cryptographic instruction.

2. The processor with the elliptic curve cryptographic algorithm as claimed in claim 1 , wherein: parameters used in the first elliptic curve cryptographic instruction include the Hash value pointer, the private key pointer, and a signature pointer pointing to the second storage space.

3. The processor with the elliptic curve cryptographic algorithm as claimed in claim 1 , further comprising:
a third register, storing an intermediate variable pointer, pointing to a third storage space within the system memory;
wherein an intermediate variable generated by the processor while performing the signature procedure on the Hash value is stored in the third storage space as indicated by the intermediate variable pointer obtained from the third register.

4. The processor with the elliptic curve cryptographic algorithm as claimed in claim 3 , wherein: prior to performing the signature procedure on the Hash value, the processor stores a starting address of the third storage space in the third register, and resets all bytes in the third storage space to zero.

5. The processor with the elliptic curve cryptographic algorithm as claimed in claim 4 , wherein: the third storage space is allocated by an operating system according to a request from software.

6. The processor with the elliptic curve cryptographic algorithm as claimed in claim 1 , further comprising:
a fourth register, wherein a length of the digital signature is programmed into the fourth register when the processor finishes the signature procedure on the Hash value.

7. The processor with the elliptic curve cryptographic algorithm as claimed in claim 1 , further comprising:
a fifth register, storing a signature pointer pointing to the second storage space, wherein when finishing the signature procedure on the Hash value, the processor produces an address increment on the signature pointer stored in the fifth register, and the address increment is equal to a length of the digital signature.

8. The processor with the elliptic curve cryptographic algorithm as claimed in claim 1 , further comprising:
a sixth register, storing a control word, indicating performing the signature procedure in response to the first elliptic curve cryptographic instruction.

9. The processor with the elliptic curve cryptographic algorithm as claimed in claim 1 , wherein:
according to the microinstructions:
the set of architectural registers is defined, read and updated; and
when a register in the set of architectural registers provides a control word indicating a signature code, the cryptographic unit using the set of architectural registers performs the signature procedure on the Hash value based on the private key.

10. The processor with the elliptic curve cryptographic algorithm as claimed in claim 1 , wherein:
the elliptic curve cryptographic algorithm engine further includes hardware for modular inverse calculation, which receives a first modular inverse input and a second modular inverse input to generate a modular inverse output;
the elliptic curve cryptographic algorithm engine further includes hardware for modular multiplication calculation, which receives a first modular multiplication input, a second modular multiplication input, and a third modular multiplication input to generate a modular multiplication output;
when r is not zero and r+k is not n, the processor executes a modular inverse microinstruction and a modular multiplication microinstruction provided by the microinstructions decoded from the first elliptic curve cryptographic instruction;
in response to the modular inverse microinstruction, the hardware for modular inverse calculation calculates:
s ′=(1+ d A ) −1 mod n

where d A is the private key, (1+d A ) is the first modular inverse input, n is the second modular inverse input, and s′ is the modular inverse output;
in response to the modular multiplication microinstruction, the hardware for modular multiplication calculation calculates:
s =( s ′*( k−r*d A ))mod n

where s′ is the first modular m

Assignees

• Shanghai Zhaoxin Semiconductor Co Ltd

Inventors

• Li Yanting
• Huang Zhenhua
• Guan Yingbing
• Shen Yun
• Yi Lei
• Yang Shuang

Classifications

• G06F9/30007

  to perform operations on data operands · CPC title

• G06F7/725

  over elliptic curves · CPC title

• H04L2209/12

  Details relating to cryptographic hardware or logic circuitry · CPC title

• H04L9/3066

  involving algebraic varieties, e.g. elliptic or hyper-elliptic curves · CPC title

• G06F9/30029

  Logical and Boolean instructions, e.g. XOR, NOT · CPC title