Micro display pixel driver controller

US12361867B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12361867-B2
Application numberUS-202318537819-A
CountryUS
Kind codeB2
Filing dateDec 13, 2023
Priority dateDec 16, 2022
Publication dateJul 15, 2025
Grant dateJul 15, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A pixel driver controller includes a reference current source configured to supply a reference current, a current mirror source configured to provide a mirror current, a first current switch coupled to the current mirror source to receive the mirror current, a pixel display data memory configured to store pixel display data coupled to the first current switch, a second current switch coupled to the first current switch, and a controller coupled to the second current switch and configured to control a switch-on status of the second current switch.

First claim

Opening claim text (preview).

We claim: 1. A pixel driver controller, comprising: a reference current source configured to supply a reference current; a current mirror source, coupled to receive the reference current, configured to provide a mirror current having a current value equal to a current value of the reference current; a first current switch coupled to the current mirror source to receive the mirror current, the first current switch being further coupled to a light emitting diode (LED) device to control flow of the mirror current to the LED device; a pixel display data memory coupled to the first current switch and configured to store pixel display data; a second current switch coupled to the first current switch; a power source coupled to the reference current source, the current mirror source, and the second current switch; and a controller coupled to the second switch and configured to control at least one of a global brightness or a gray scale level of the LED device by controlling a switch-on status of the second current switch. 2. The pixel driver controller according to claim 1 , wherein the first current switch comprises a first set of one or more transistors and the second current switch comprises a second set of one or more transistors respectively coupled to the first set of one or more transistors; gates of the second set of one or more transistors are coupled to the controller; sources of the second set of one or more transistors are coupled to the power source; drains of the second set of one or more transistors are respectively coupled to gates of the first set of one or more transistors; sources of the first set of one or more transistors are coupled to the current mirror source; drains of the first set of one or more transistor are coupled to the LED device; and the pixel display data memory is coupled to the gates of the first set of one or more transistors. 3. The pixel driver controller according to claim 1 , wherein the controller is configured to control the gray scale level by controlling a switch-on time duration of the second current switch. 4. The pixel driver controller according to claim 1 , wherein the controller is configured to control the global brightness of the LED device by controlling a duty cycle of the second current switch. 5. The pixel driver controller according to claim 1 , further comprising a test circuit coupled to the LED device and the controller. 6. A display back plane system, comprising: a power controller, and a pixel driving controller array, wherein the pixel driving controller array comprises: a reference current source configured to supply a reference current; a current mirror source, coupled to receive the reference current, configured to provide a mirror current having a current value equal to a current value of the reference current; a first current switch coupled to the current mirror source to receive the mirror current, the first current switch being further coupled to a light emitting diode (LED) device to control flow of the mirror current to the LED device; a pixel display data memory coupled to the first current switch and configured to store pixel display data; a second current switch coupled to the first current switch; a power source coupled to the reference current source, the current mirror source, and the second current switch; and a processing time controller coupled to the second switch and configured to control at least one of a global brightness or a gray scale level of the LED device by controlling a switch-on status of the second current switch. 7. The display back plane system according to claim 6 , wherein the first current switch comprises a first set of one or more transistors and the second current switch comprises a second set of one or more transistors respectively coupled to the first set of one or more transistors; gates of the second set of one or more transistors are coupled to the processing time controller; sources of the second set of one or more transistors are coupled to the power source; drains of the second set of one or more transistors are respectively coupled to gates of the first set of one or more transistors; sources of the first set of one or more transistors are coupled to the current mirror source; drains of the first set of one or more transistor are coupled to the LED device; and the pixel display data memory is coupled to the gates of the first set of one or more transistors. 8. The display back plane system according to claim 6 , wherein the processing time controller is configured to control the gray scale level by controlling a switch-on time duration of the second current switch. 9. The display back plane system according to claim 6 , wherein the processing time controller is configured to control the global brightness of the LED device by controlling a duty cycle of the second current switch. 10. The display back plane system according to claim 6 , further comprising a test circuit coupled to the LED device and the processing time controller. 11. The display back plane system according to claim 6 , further comprising at least one of a data interface, a row driver, or a sensor. 12. A display, comprising: a light emitting diode (LED); a reference current source configured to supply a reference current; a current mirror source, coupled to receive the reference current, configured to provide a mirror current having a current value equal to a current value of the reference current; a first current switch coupled to the current mirror source to receive the mirror current, the first current switch being further coupled to the LED device to control flow of the mirror current to the LED device; a pixel display data memory coupled to the first current switch and configured to store pixel display data; a second current switch coupled to the first current switch; a power source coupled to the reference current source, the current mirror source, and the second current switch; and a controller coupled to the second switch and configured to control at least one of a global brightness or a gray scale level of the LED device by controlling a switch-on status of the second current switch. 13. The display according to claim 12 , wherein the first current switch comprises a first set of one or more transistors and the second current switch comprises a second set of one or more transistors respectively coupled to the first set of one or more transistors; gates of the second set of one or more transistors are coupled to the controller; sources of the second set of one or more transistors are coupled to the power source; drains of the second set of one or more transistors are respectively coupled to gates of the first set of one or more transistors; sources of the first set of one or more transistors are coupled to the current mirror source; drains of the first set of one or more transistor are coupled to the LED device; and the pixel display data memory is coupled to the gates of the first set of one or more transistors. 14. The display according to claim 12 , wherein the controller is configured to control the gray scale level by controlling a switch-on time duration of the second current switch. 15. The display according to claim 12 , wherein the controller is configured to control the global brightness of the LED device by controlling a duty cycle of the second current switch. 16. The display according to claim 12 , further comprising a test circuit coupled to the LED device and the controller.

Assignees

Inventors

Classifications

  • Test circuits or failure detection circuits included in a display system, as permanent part thereof · CPC title

  • by time modulation of the brightness of the illumination source · CPC title

  • Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping · CPC title

  • G09G3/2018Primary

    by time modulation using two or more time intervals · CPC title

  • G09G3/32Primary

    semiconductive, e.g. using light-emitting diodes [LED] · CPC title

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Frequently asked questions

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What does patent US12361867B2 cover?
A pixel driver controller includes a reference current source configured to supply a reference current, a current mirror source configured to provide a mirror current, a first current switch coupled to the current mirror source to receive the mirror current, a pixel display data memory configured to store pixel display data coupled to the first current switch, a second current switch coupled to…
Who is the assignee on this patent?
Jade Bird Display Shanghai Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/2018. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jul 15 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).