Temporal data structures in a ray tracing architecture

US12361629B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12361629-B2
Application numberUS-202318372783-A
CountryUS
Kind codeB2
Filing dateSep 26, 2023
Priority dateApr 1, 2017
Publication dateJul 15, 2025
Grant dateJul 15, 2025

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Abstract

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A graphics processing apparatus comprising bounding volume hierarchy (BVH) construction circuitry to perform a spatial analysis and temporal analysis related to a plurality of input primitives and responsively generate a BVH comprising spatial, temporal, and spatial-temporal components that are hierarchically arranged, wherein the spatial components include a plurality of spatial nodes with children, the spatial nodes bounding the children using spatial bounds, and the temporal components comprise temporal nodes with children, the temporal nodes bounding their children using temporal bounds and the spatial-temporal components comprise spatial-temporal nodes with children, the spatial-temporal nodes bounding their children using spatial and temporal bounds; and ray traversal/intersection circuitry to traverse a ray or a set of rays through the BVH in accordance with the spatial and temporal components.

First claim

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What is claimed is: 1. A graphics processor comprising: a core to execute graphics commands and render images based on a plurality of rays traversed through a bounding volume hierarchy that comprises a plurality of hierarchically arranged nodes constructed based on a plurality of input primitives, each node including multi-dimensional spatial components and at least one node also including temporal components; a load/store circuit coupled to the core; and memory coupled to the core and the load/store circuit, wherein the core is to perform an interpolation based on detected movement of an input primitive of the plurality of input primitives within the multi-dimensional spatial components and temporal components of the at least one node, traverse a ray of the plurality of rays through the bounding volume hierarchy, and determine an intersection between the ray and the input primitive based on the interpolation and a timestamp associated with the ray. 2. The graphics processor of claim 1 , wherein the core is to perform a temporal analysis related to the plurality of input primitives and responsively generate the plurality of hierarchically arranged nodes. 3. The graphics processor of claim 1 , wherein the temporal components comprise temporal bounds indicated by a first timestamp and a second timestamp. 4. The graphics processor of claim 3 , wherein the ray is tested for intersection with the input primitive only if the timestamp associated with the ray is bounded by the first timestamp and the second timestamp. 5. The graphics processor of claim 1 , wherein the interpolation comprises a linear interpolation. 6. The graphics processor of claim 1 , wherein each ray of the plurality of rays is associated with a timestamp. 7. The graphics processor of claim 1 , wherein each ray of the plurality of rays is associated with a group of rays and wherein a timestamp is associated with all rays in the group of rays. 8. The graphics processor of claim 1 , wherein the spatial components include a plurality of spatial nodes with children, the spatial nodes bounding their children using spatial components. 9. The graphics processor of claim 8 , wherein the temporal components comprise minimum and maximum time values. 10. The graphics processor of claim 1 , wherein the input primitives comprise triangles. 11. A method comprising: coupling, in a graphics processor, a core and a load/store circuit with a memory; executing, by the core, graphics commands and rendering images based on a plurality of rays traversed through a bounding volume hierarchy that comprises a plurality of hierarchically arranged nodes constructed based on a plurality of input primitives, each node including multi-dimensional spatial components and at least one node also including temporal components; performing an interpolation based on detected movement of an input primitive of the plurality of input primitives within the multi-dimensional spatial components and temporal components of the at least one node; traversing a ray of the plurality of rays through the bounding volume hierarchy; and determining an intersection between the ray and the input primitive based on the interpolation and a timestamp associated with the ray. 12. The method of claim 11 , wherein the core is to perform a temporal analysis related to the plurality of input primitives and responsively generate the plurality of hierarchically arranged nodes. 13. The method of claim 11 , wherein the temporal components comprise temporal bounds indicated by a first timestamp and a second timestamp. 14. The method of claim 13 , wherein the ray is tested for intersection with the input primitive only if the timestamp associated with the ray is bounded by the first timestamp and the second timestamp. 15. The method of claim 11 , wherein the interpolation comprises a linear interpolation. 16. The method of claim 11 , wherein each ray of the plurality of rays is associated with a timestamp. 17. The method of claim 11 , wherein each ray of the plurality of rays is associated with a group of rays and wherein a timestamp is associated with all rays in the group of rays. 18. The method of claim 11 , wherein the spatial components include a plurality of spatial nodes with children, the spatial nodes bounding their children using spatial components. 19. The method of claim 18 , wherein the temporal components comprise minimum and maximum time values. 20. The method of claim 11 , wherein the input primitives comprise triangles.

Assignees

Inventors

Classifications

  • Aspects of the architecture of display systems · CPC title

  • Three-dimensional [3D] modelling for computer graphics · CPC title

  • Processor architectures; Processor configuration, e.g. pipelining · CPC title

  • Ray-tracing · CPC title

  • G06T15/005Primary

    General purpose rendering architectures · CPC title

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What does patent US12361629B2 cover?
A graphics processing apparatus comprising bounding volume hierarchy (BVH) construction circuitry to perform a spatial analysis and temporal analysis related to a plurality of input primitives and responsively generate a BVH comprising spatial, temporal, and spatial-temporal components that are hierarchically arranged, wherein the spatial components include a plurality of spatial nodes with chi…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification G06T15/005. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jul 15 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).