Digitizer panel and electronic device including the same

US12360562B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12360562-B2
Application numberUS-202217588764-A
CountryUS
Kind codeB2
Filing dateJan 31, 2022
Priority dateFeb 9, 2021
Publication dateJul 15, 2025
Grant dateJul 15, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An electronic device according to certain embodiments comprises: a digitizer panel; and a printed circuit board electrically connected to the digitizer panel, wherein the digitizer panel includes: a body including an insulating layer, a first layer laminated on a first surface of the insulating layer and including first connection pads, a second layer laminated on a second surface opposite to the first surface of the insulating layer, signal patterns included in the first layer and the second layer, and dummy patterns electrically disconnected from the signal patterns, and a connection part including second connection pads corresponding to the first connection pads and electrically connected to the printed circuit board, wherein the signal patterns included in the first layer and the signal patterns included in the second layer are electrically connected to each other by a via hole disposed in the insulating layer, and dummy patterns are arranged in a pad region of the second layer facing a portion in which the first connection pads are arranged.

First claim

Opening claim text (preview).

The invention claimed is: 1. An electronic device comprising: a display panel; a digitizer panel; and a printed circuit board electrically connected to the digitizer panel, wherein the digitizer panel includes: an insulating layer, having a first surface and a second surface opposite to the first surface, a plurality of first signal lines arranged on the first surface; a plurality of second signal lines arranged on the second surface, first connection pads arranged in a pad region of the first surface, a plurality of dummy lines arranged on the second surface under the pad region of the first surface, the plurality of dummy lines electrically disconnected from the plurality of first signal lines and the plurality of second signal lines, and second connection pads corresponding to the first connection pads and electrically connected to the printed circuit board, wherein: wherein the plurality of first signal lines are electrically connected to at least one via hole in the insulating layer at the first surface, and plurality of the second signal lines are electrically connected to the at least one via hole in the insulating layer at the second surface, the first connection pads include a plurality of first pads arranged to overlap with the plurality of dummy lines and a plurality of second pads arranged to overlap with the plurality of second signal lines, the plurality of second signal lines includes a plurality of second signal line groups separated from each other with a designated distance, each of the plurality of second signal line groups comprising at least one second signal line, and the plurality of dummy lines are disposed between each of the plurality of second signal line groups to correspond to at least one of the plurality of first pads. 2. The electronic device of claim 1 , wherein the plurality of first signal lines and the plurality of second signal lines include signal lines extending in a first direction and arranged in a second direction perpendicular to the first direction, and signal lines extending in the second direction and arranged in the first direction. 3. The electronic device of claim 2 , wherein the first connection pads extend in the first direction and are arranged in the second direction. 4. The electronic device of claim 3 , wherein the plurality of dummy lines extends in the first direction to be parallel to the first connection pads and are arranged in the second direction. 5. The electronic device of claim 3 , wherein the signal lines extending in the first direction include (1-1)th signal lines arranged on the first layer and (1-2)th signal lines arranged on the second layer, and the (1-1)th signal lines and the (1-2)th signal lines are electrically connected to each other by the at least one via hole. 6. The electronic device of claim 5 , wherein some of the (1-2)th signal lines are arranged on the second layer under the pad region of the first layer. 7. The electronic device of claim 6 , wherein, under the pad region of the first layer, the (1-2)th signal lines and the plurality of dummy lines are arranged such that an interval between the (1-2)th signal lines, an interval between the (1-2)th signal lines and the plurality of dummy lines, and an interval between the plurality of dummy lines are smaller than an interval between the first connection pads. 8. The electronic device of claim 6 , wherein a width of the (1-2)th signal lines is greater than a width of the first connection pads. 9. The electronic device of claim 6 , wherein a width of the plurality of dummy lines is greater than a width of the first connection pads. 10. The electronic device of claim 1 , wherein the first connection pads and the second connection pads are electrically connected to each other by a conductive adhesive member. 11. A digitizer panel comprising: an insulating layer, having a first surface and a second surface opposite to the first surface; a plurality of first signal lines arranged on the first surface; a plurality of second signal lines arranged on the second surface; first connection pads arranged in a pad region of the first surface, a plurality of dummy lines arranged on the second surface under the pad region of the first surface, the plurality of dummy lines electrically disconnected from the plurality of first signal lines and the plurality of second signal lines, and second connection pads corresponding to the first connection pads and electrically connected to the printed circuit board, wherein; wherein the plurality of first signal lines are electrically connected to at least one via hole in the insulating layer at the first surface, and the plurality of second signal lines are electrically connected to the via hole in the insulating layer at the second surface, the first connection pads include a plurality of first pads arranged to overlap with the plurality of dummy lines and a plurality of second pads arranged to overlap with the plurality of second signal lines, the plurality of second signal lines includes a plurality of second signal line groups separated from each other with a designated distance, each of the plurality of second signal line groups comprising at least one second signal line, and the plurality of dummy lines are disposed between each of the plurality of second signal line groups to correspond to at least one of the plurality of first pads. 12. The digitizer panel of claim 11 , wherein the plurality of first signal lines and the plurality of second signal lines include signal lines extending in a first direction and arranged in a second direction perpendicular to the first direction, and signal lines extending in the second direction and arranged in the first direction. 13. The digitizer panel of claim 12 , wherein the first connection pads extend in the first direction and are arranged in the second direction. 14. The digitizer panel of claim 13 , wherein the plurality of dummy lines extends in the first direction to be parallel to the first connection pads and are arranged in the second direction. 15. The digitizer panel of claim 12 , wherein the signal lines extending in the first direction include (1-1)th signal lines arranged on the first layer and (1-2)th signal lines arranged on the second layer, and the (1-1)th signal lines and the (1-2)th signal lines are electrically connected to each other by the at least one via hole. 16. The digitizer panel of claim 15 , wherein some of the (1-2)th signal lines are arranged on the second layer under the pad region of the first layer. 17. The digitizer panel of claim 16 , wherein, the (1-2)th signal lines and the plurality of dummy lines are arranged such that an interval between the (1-2)th signal lines, an interval between the (1-2)th signal lines and the plurality of dummy lines, and an interval between the plurality of dummy lines are smaller than an interval between the first connection pads. 18. The digitizer panel of claim 16 , wherein a width of the (1-2)th signal lines is greater than a width of the first connection pads. 19. The digitizer panel of claim 16 , wherein a width of the plurality of dummy lines is greater than a width of the first connection pads.

Assignees

Inventors

Classifications

  • by electromagnetic means · CPC title

  • by capacitive means · CPC title

  • Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads · CPC title

  • with folding flat displays, e.g. laptop computers or notebooks having a clamshell configuration, with body parts pivoting to an open position around an axis parallel to the plane they define in closed position · CPC title

  • Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means · CPC title

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What does patent US12360562B2 cover?
An electronic device according to certain embodiments comprises: a digitizer panel; and a printed circuit board electrically connected to the digitizer panel, wherein the digitizer panel includes: a body including an insulating layer, a first layer laminated on a first surface of the insulating layer and including first connection pads, a second layer laminated on a second surface opposite to t…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06F1/1643. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jul 15 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).