Display substrate and display device

Patent metadata

Field	Value
Publication number	US-12356596-B2
Application number	US-202318372298-A
Country	US
Kind code	B2
Filing date	Sep 25, 2023
Priority date	Feb 19, 2020
Publication date	Jul 8, 2025
Grant date	Jul 8, 2025

Abstract

The present disclosure provides a display substrate, including: a display area and a bonding area positioned on a side of the display area, the bonding area includes a plurality of bonding sub-areas arranged at intervals, the bonding sub-areas are arranged along a direction in which an edge of the display area extends and configured for bonding a chip-on-film, where a first antistatic layer is further arranged on the bonding area, at least a part of the first antistatic layer is positioned between adjacent ones of the bonding sub-areas, and the first antistatic layer is electrically coupled to a reference signal terminal. The present disclosure further provides a display device.

First claim

The invention claimed is:

1. A display device, comprising a display substrate, with the display substrate comprising a display area and a bonding area positioned on a side of the display area,
wherein the bonding area comprises a plurality of bonding sub-areas arranged at intervals, the bonding sub-areas are arranged along a direction in which an edge of the display area extends and configured for bonding a chip-on-film,
the bonding area is provided with a first antistatic layer thereon, at least a part of the first antistatic layer is located between adjacent ones of the bonding sub-areas, and the first antistatic layer is electrically coupled to a reference signal terminal,
the display device further comprises a chip-on-film, one end of the chip-on-film is bound with the bonding sub-area, and another end of the chip-on-film is bound with a driving circuit board,
the driving circuit board is provided with a ground terminal thereon, and the reference signal terminal is electrically coupled to the ground terminal on the driving circuit board through the chip-on-film, and
the first antistatic layer partially overlaps the chip-on-film adjacent to the first antistatic layer in a first direction, with the first direction being a direction in which the bonding area and the display area are arranged.

2. The display device of claim 1 , wherein the chip-on-film comprises a body portion and a protrusion portion, with the protrusion portion protruding from the body portion toward the chip-on-film adjacent thereto;
the first antistatic sub-layer comprises a first antistatic part, a second antistatic part and a third antistatic part, the second antistatic part is positioned between body portions of adjacent chip-on-films, the first antistatic part is positioned on a side, away from the display area, of the second antistatic part, at least a part of the first antistatic part is positioned between protruding portions of the adjacent chip-on-films, and the third antistatic part is positioned on a side, proximal to the display area, of the second antistatic part.

3. The display device of claim 2 , wherein the first antistatic part, the second antistatic part, and the third antistatic part are formed into an integrated structure as a single piece.

4. The display device of claim 1 , wherein the display substrate further comprises a signal terminal configured to provide a display signal to the display area, with the signal terminal being located at a side of the bonding area proximal to the display area, and the signal terminal being located between the display area and the first antistatic layer and isolated from outside by the first antistatic layer.

5. The display device of claim 1 , wherein the reference signal terminal is disposed on the bonding sub-area and configured to be electrically connectable to an external ground terminal through the chip-on-film.

6. The display device of claim 1 , wherein the first antistatic layer comprises a first antistatic sub-layer and a second antistatic sub-layer, the second antistatic sub-layer is disposed on a side of the first antistatic sub-layer proximal to the display area, and the first antistatic sub-layer and the second antistatic sub-layer are both electrically coupled to the reference signal terminal.

7. The display device of claim 6 , wherein the first antistatic sub-layer is disposed electrically isolated from the second antistatic sub-layer.

8. The display device of claim 1 , wherein the first antistatic layer is provided with a first through hole therein.

9. The display device of claim 8 , wherein the first through hole is a stripe through hole.

10. The display device of claim 1 , wherein the display substrate further comprises a first frame area, a second frame area, and a third frame area coupled in sequence, the first frame area, the second frame area, the third frame area, and the bonding area surround the display area, and each of the first frame area, the second frame area, and the third frame area is provided with a second antistatic layer thereon, and the second antistatic layer is electrically coupled to the reference signal terminal.

11. The display device of claim 10 , wherein the display substrate further comprises a conductive layer comprising a connection line and an auxiliary conductive portion coupled in parallel to the connection line, with the second antistatic layer being electrically coupled to the reference signal terminal through the connection line.

12. The display device of claim 10 , wherein a second through hole is formed at a position of the second antistatic layer proximal to a corner of the display substrate, and an alignment mark is formed in the second through hole for position alignment and adjustment.

13. A display device, comprising a display substrate, with the display substrate comprising a display area and a bonding area positioned on a side of the display area,
wherein the bonding area comprises a plurality of bonding sub-areas arranged at intervals, the bonding sub-areas are arranged along a direction in which an edge of the display area extends and configured for bonding a chip-on-film,
the bonding area is provided with a first antistatic layer thereon, at least a part of the first antistatic layer is located between adjacent ones of the bonding sub-areas, and the first antistatic layer is electrically coupled to a reference signal terminal,
the display device further comprises a chip-on-film, one end of the chip-on-film is bound with the bonding sub-area, and another end of the chip-on-film is bound with a driving circuit board,
the driving circuit board is provided with a ground terminal thereon, and the reference signal terminal is electrically coupled to the ground terminal on the driving circuit board through the chip-on-film,
the chip-on-film comprises a body portion and a protrusion portion, with the protrusion portion protruding from the body portion toward the chip-on-film adjacent thereto, and
the first antistatic sub-layer comprises a first antistatic part, a second antistatic part and a third antistatic part, the second antistatic part is positioned between body portions of adjacent chip-on-films, the first antistatic part is positioned on a side, away from the display area, of the second antistatic part, at least a part of the first antistatic part is positioned between protruding portions of the adjacent chip-on-films, and the third antistatic part is positioned on a side, proximal to the display area, of the second antistatic part.

14. The display device of claim 13 , wherein the first antistatic part, the second antistatic part, and the third antistatic part are formed into an integrated structure as a single piece.

15. The display device of claim 13 , wherein the display substrate further comprises a signal terminal configured to provide a display signal to the display area, with the signal terminal being located at a side of the bonding area proximal to the display area, and the signal terminal being located between the display area and the first antistatic layer and isolated from outside by the first antistatic layer.

16. The display device of claim 13 , wherein the reference signal terminal is disposed on the bonding sub-area and configured to be electrically connectable to an external ground terminal through the chip-on-film.

17. The display device of claim 13 , wherein the first antistatic layer comprises a first antistatic sub-layer and a second antistatic sub-layer, the second antistatic sub-layer is disposed on a side of the first antistatic sub-layer proximal to the display area, an

Assignees

• Beijing Boe Display Tech Co
• Boe Technology Group Co Ltd

Inventors

• Qi Yaya
• Dong Dianzheng
• Yan Yan
• Wang Xiao
• Wang Xue
• Wang Tingting
• Li Xiaoying
• Ma Zhiqiang

Classifications

• H05K1/02

  Details · CPC title

• H05F3/00

  Carrying-off electrostatic charges ({from shoes A43B7/36}; from living beings A61N1/14; {from tyres B60C19/08; from vehicles B60R16/06; from aircraft B64D45/02; from large containers B65D90/46}) · CPC title

• G02F2202/22

  Antistatic materials or arrangements · CPC title

• H05K9/0064

  Earth or grounding circuit · CPC title

• G02F1/133388

  with constructional differences between the display region and the peripheral region · CPC title