Bump structures for low temperature chip bonding

Patent metadata

Field	Value
Publication number	US-12354988-B2
Application number	US-202217745363-A
Country	US
Kind code	B2
Filing date	May 16, 2022
Priority date	May 16, 2022
Publication date	Jul 8, 2025
Grant date	Jul 8, 2025

Abstract

A method of forming a multi-chip system is disclosed. The method includes forming one or more bumps on respective conductive contact pads of a first electronic device, forming one or more mini-bumps on respective conductive contact pads of a second electronic device, and aligning respective one or more mini-bumps with respective one or more bumps. The method further includes performing a bump bonding process that exerts compression force on one or both the first electronic device and the second electronic device to compress the one or more mini-bumps into the one or more bumps to form one or more bump bond structures that bond the second electronic device to the first electronic device.

First claim

What is claimed is:

1. A method of forming a multi-chip system, the method comprising:
forming a first under bump metallization (UBM) layer on respective conductive contact is of a first electronic device:
for a second UBM layer on respective conductive contact pads of a second electronic device
forming one or more bumps on the first UBM layer of the first electronic device;
forming one or more mini-bumps the second UBM layer of the second electronic device;
aligning respective one or more mini-bumps with respective one or more bumps; and
performing a bump bonding process that exerts compression force on one or both the first electronic device and the second electronic device to compress the one or more mini-bumps into the one or more bumps to form one or more bump bond structures that bond the second electronic device to the first electronic device.

2. The method of claim 1 , wherein the temperature of the bump bonding process is less than or equal to 150° C.

3. The method of claim 1 , wherein each of the one or more bumps and the one or more mini-bumps are formed from a material selected from a group comprising gold, copper or a non-conductive material.

4. The method of claim 1 , wherein an initial surface area of a given bump of the one or more bumps relative to a given mini-bump of the one or more mini-bumps, prior to performing the bump bonding process, ranges from about 10:1 to about 50:1.

5. The method of claim 4 , wherein the initial surface area of the given bump of the one or more bumps relative to the given mini-bump of the one or more mini-bumps, prior to performing the bump bonding process, is about 25:1.

6. The method of claim 1 , wherein the compression force of the bump bonding process is selected to allow for each of the one or more bumps to act as compression stops once the respective one or more mini-bumps are substantially compressed into the respective one or more bumps.

7. The method of claim 1 , wherein each of the first and second UBM layers have a thickness between about 100 Å to about 5000 Å to promote adhesion and to provide similar properties as the underlying conductive contact pad.

8. The method of claim 1 , wherein each of the first UBM layer and the second UBM layer can be formed of a titanium/gold stack with a thickness of 350 Å /3000 Å.

9. The method of claim 1 , wherein each of the first and second UBM layers are formed from one or more conductive materials selected from the group comprising gold, titanium, chromium, and platinum.

10. The method of claim 1 , further comprising forming one or more low melting temperature bump bond structures between the first electronic device and the second electronic device concurrently with the forming of the one or more bump bond structures.

11. The method of claim 10 , wherein each of the one or more low melting temperature bump bond structures are formed from indium.

12. A multi-chip system comprising:
a first electronic device having a plurality of first conductive contact pads disposed on a top side of a first electronic device;
a second electronic device having a plurality of second conductive contact pads disposed on a bottom side of a second electronic device;
a first under bump metallization (UBM) layer disposed on respective conductive contact pads of the first electronic device:
a second UBM layer disposed of respective conductive contact pads of the second electronic device; and
a plurality of bump bond structures with a given bump bond structure coupling the first UBM layer and respective conductive contact pads of the plurality of first conductive contact pads to the second UBM layer and respective conductive contact pads of the second plurality of conductive pads to bond the first electronic device to the second electronic device, each of the plurality of bump bond structures comprising a mini-bump compressed into a bump.

13. The system of claim 12 , wherein the bump and the mini-bump of each of the plurality of bump bond structures are selected from a group comprising gold, copper or a non- conductive material.

14. The system of claim 12 , wherein an initial surface area of a given bump of the plurality of bump bond structures relative to a given mini-bump of the plurality of bump bond structures, prior to the respective mini-bumps being compressed into respective bumps, ranges from about 10:1 to about 50:1.

15. The system of claim 12 , wherein each of the first and second UBM layers have a thickness between about 100 Å to about 5000 Å to promote adhesion and to provide similar properties as the underlying conductive contact pad.

16. The system of claim 12 , wherein the first and second UBM layers are formed from one or more conductive materials selected from the group comprising gold, titanium, chromium, and platinum.

17. The system of claim 12 , further comprising one or more low melting temperature bump bond structures coupling the first electronic device and the second electronic device.

18. The system of claim 17 , wherein each of the one or more low melting temperature bump bond structures are formed from indium.

19. A method of forming a multi-chip system, the method comprising:
forming one or more bumps on respective conductive contact pads of a first electronic device;
forming one or more mini-bumps on respective conductive contact pads of a second electronic device;
aligning respective one or more mini-bumps with respective one or more bumps;
performing a bump bonding process that exerts compression force on one or both the first electronic device and the second electronic device to compress the one or more mini-bumps into the one or more bumps to form one or more bump bond structures that bond the second electronic device to the first electronic device; and
forming one or more low melting temperature bump bond structures between the first electronic device and the second electronic device concurrently with the forming of the one or more bump bond structures.

20. The method of claim 19 , wherein each of the one or more low melting temperature bump bond structures are formed from indium.

Assignees

• Hackley Justin C
• Hartman Jeffrey David
• Northrop Grumman Systems Corp

Inventors

• Hackley Justin C
• Hartman Jeffrey David

Classifications

• H10W90/722

  between stacked chips · CPC title

• H10W72/07232

  Compression bonding, e.g. thermocompression bonding · CPC title

• H10W72/252

  comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu · CPC title

• H10W72/251

  Materials · CPC title

• H10W72/072 Primary

  of bump connectors · CPC title