Thin film transistor substrate and display apparatus comprising the same

Patent metadata

Field	Value
Publication number	US-12354556-B2
Application number	US-202318362493-A
Country	US
Kind code	B2
Filing date	Jul 31, 2023
Priority date	Aug 12, 2022
Publication date	Jul 8, 2025
Grant date	Jul 8, 2025

Abstract

Disclosed is a thin film transistor substrate comprising a substrate; a first thin film transistor on the substrate, the first thin film transistor including a first active layer and a first gate electrode; a second thin film transistor on the substrate, the second thin film transistor including a second active layer and a second gate electrode above the first active layer and the first gate electrode; a first insulating layer between the first gate electrode and the second active layer; and; and a first connection electrode connecting together the first active layer and the second active layer, the first connection electrode extending through a first contact hole in the first insulating layer and is in contact with each of the first active layer and the second active layer and a display apparatus including the same.

First claim

What is claimed is:

1. A thin film transistor substrate comprising:
a substrate;
a first thin film transistor on the substrate, the first thin film transistor including a first active layer and a first gate electrode;
a second thin film transistor on the substrate, the second thin film transistor including a second active layer and a second gate electrode above the first active layer and the first gate electrode;
a first insulating layer between the first gate electrode and the second active layer; and
a first connection electrode connecting together the first active layer and the second active layer, the first connection electrode extending through a first contact hole in the first insulating layer and is in contact with each of the first active layer and the second active layer,
wherein a gate driver is on the substrate, the gate driver including the first thin film transistor and the second thin film transistor.

2. The thin film transistor substrate according to claim 1 , wherein the gate driver includes a shift register comprising a pull-up transistor configured to output a gate-on signal and a pull-down transistor configured to output a gate-off signal, and the first thin film transistor and the second thin film transistor are connected in parallel and collectively form the pull-up transistor, or the first thin film transistor and the second thin film transistor connected in parallel and collectively form the pull-down transistor.

3. The thin film transistor substrate according to claim 1 , wherein the gate driver includes a shift register comprising a pull-up transistor configured to output a gate-on signal and a pull-down transistor configured to output a gate-off signal, and the first thin film transistor is one of the pull-up transistor or the pull-down transistor, and the second thin film transistor is another one of the pull-up transistor or the pull-down transistor.

4. The thin film transistor substrate according to claim 1 , wherein a portion of a lower surface of the second active layer is in contact with a side surface and a portion of an upper surface of the first connection electrode.

5. The thin film transistor substrate according to claim 1 , wherein an end of the second active layer is in contact with a side surface of the first connection electrode.

6. The thin film transistor substrate according to claim 1 , wherein the second active layer is in contact with a first side of the first connection electrode, a second side of the first connection electrode that is opposite the first side, and an upper surface of the first connection electrode that is between the first side and the second side of the first connection electrode.

7. The thin film transistor substrate according to claim 1 , wherein the second thin film transistor further comprises a second drain electrode in contact with the second active layer,
wherein a first side of the second active layer is in contact with the first connection electrode, and a second side of the second active layer that is opposite the first side of the second active layer is in contact with the second drain electrode,
and an overlapping structure between the first side of the second active layer and the first connection electrode is different from an overlapping structure between the second side of the second active layer and the second drain electrode.

8. The thin film transistor substrate according to claim 1 , wherein each of the first active layer and the second active layer includes a channel part and a connection part connected to a side of the channel part, the connection part having an electrical conductivity that is greater than an electrical conductivity of the channel part, and the first connection electrode is in contact with the connection part of the first active layer and the connection part of the second active layer.

9. The thin film transistor substrate according to claim 1 , wherein the first connection electrode comprises a second source electrode of the second thin film transistor.

10. The thin film transistor substrate according to claim 1 , wherein the first connection electrode comprises the second active layer of the second thin film transistor.

11. The thin film transistor substrate according to claim 10 , wherein the second active layer includes a channel part and a connection part connected to a side of the channel part, the connection part having an electrical conductivity that is greater than an electrical conductivity of the channel part, and the first connection electrode is the connection part.

12. The thin film transistor substrate according to claim 10 , further comprising:
a second source electrode in contact with an upper surface of the first connection electrode.

13. The thin film transistor substrate according to claim 1 , wherein the second thin film transistor further comprises a second drain electrode in contact with the second active layer and the thin film transistor substrate further comprising:
a second insulating layer on the second active layer; and
a bridge electrode on the second insulating layer, the bridge electrode electrically connected to the second drain electrode of the second thin film transistor through a second contact hole in the second insulating layer.

14. The thin film transistor substrate according to claim 13 , wherein the second contact hole overlaps the bridge electrode and the second drain electrode, and is non-overlapping with the second active layer.

15. The thin film transistor substrate according to claim 13 , wherein the second contact hole overlaps the bridge electrode, the second drain electrode, and the second active layer.

16. A thin film transistor substrate comprising:
a substrate;
a first thin film transistor on the substrate, the first thin film transistor including a first active layer and a first gate electrode;
a second thin film transistor on the substrate, the second thin film transistor including a second active layer and a second gate electrode above the first active layer and the first gate electrode;
a first insulating layer between the first gate electrode and the second active layer;
a first connection electrode connecting together the first active layer and the second active layer, the first connection electrode extending through a first contact hole in the first insulating layer and is in contact with each of the first active layer and the second active layer,
a light blocking layer overlapping the first active layer and electrically connected to the first active layer, the light blocking layer closer to the substrate than the first active layer;
a first capacitor electrode electrically connected to the first gate electrode on a same layer as the first gate electrode; and
a second capacitor electrode electrically connected to the light blocking layer on a same layer as the light blocking layer.

17. The thin film transistor substrate according to claim 1 , further comprising:
a first capacitor electrode electrically connected to the second gate electrode and the first capacitor electrode on a same layer as the second gate electrode; and
a second capacitor electrode on a same layer as the first connection electrode.

18. The thin film transistor substrate according to claim 1 , wherein the first gate electrode, the second gate electrode, the first active layer, and the second active layer overlap each other.

19. The thin film transistor substrate according to claim 1 , wherein a gate driver is on the substrate, the gate driver including a first shift register and a second sh

Assignees

• Lg Display Co Ltd

Inventors

• Shin Sungsoo
• Yang Jungyul
• Lee Hanseok
• Jeon Hyeji
• Chang Youngyoung
• Ryu Wonsang

Classifications

• H10D86/481

  integrated with passive devices, e.g. auxiliary capacitors · CPC title

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• H10D30/6723

  having light shields · CPC title

• G09G2310/0286

  Details of a shift registers arranged for use in a driving circuit · CPC title