Hot transition of I2C to I3C

Patent metadata

Field	Value
Publication number	US-12353349-B2
Application number	US-202318176089-A
Country	US
Kind code	B2
Filing date	Feb 28, 2023
Priority date	Feb 28, 2023
Publication date	Jul 8, 2025
Grant date	Jul 8, 2025

Abstract

A system includes a communication bus, a controller device, and a target device. The controller device and the target device may transition between different communication protocols in association with transferring data over the communication bus. The target device may receive a transaction command including a slave address. Based on the slave address, the target device may determine a communication protocol associated with transferring data in association with the transaction command. A first communication protocol may include a message protocol, and the message protocol may be associated with an I2C communication protocol or an I3C communication protocol. The second communication protocol may include a bus protocol, and the bus protocol may be associated with the I2C communication protocol.

First claim

What is claimed is:

1. An apparatus comprising:
electronic circuitry,
wherein the electronic circuitry is to:
receive, from a controller device, a transaction command comprising a slave address;
compare the slave address to a set of slave addresses in an address table, wherein the address table contains an indication of whether each slave address in the set of slave addresses is matched with either a first communication protocol or a second communication protocol;
determine, based on the comparison, a selected communication protocol for responding to the transaction command over a communication bus;
generate data associated with the transaction command; and
send the data to the controller device over the communication bus using the selected communication protocol.

2. The apparatus of claim 1 , wherein the set of slave addresses includes multiple slave addresses.

3. The apparatus of claim 1 , wherein:
the transaction command further comprises:
a first indication of a message interface associated with the slave address; or
a second indication of direct register access associated with the slave address; and

determining the selected communication protocol comprises:
identifying the first communication protocol as the selected communication protocol in response to the transaction command comprising the first indication; and
identifying the second communication protocol as the selected communication protocol in response to the transaction command comprising the second indication.

4. The apparatus of claim 1 , wherein:
the first communication protocol comprises a message protocol, wherein the message protocol is associated with an I2C communication protocol or an I3C communication protocol; and
the second communication protocol comprises a bus protocol, wherein the bus protocol is associated with the I2C communication protocol.

5. The apparatus of claim 1 , wherein the set of slave addresses comprise one or more slave addresses associated with an I2C communication protocol, one or more second slave addresses associated with an I3C communication protocol, or a combination thereof, and wherein in response to a comparison result in which the slave address fails to match a second slave address in the set of slave addresses, the electronic circuitry is to:
identify a memory corresponding to the slave address, based on comparing the slave address to the set of slave addresses comprised in the address table, wherein the memory is of a device; and
transfer the data to or from the memory of the device in association with the transaction command, using the first communication protocol as the selected communication protocol, wherein the first communication protocol comprises the I2C communication protocol or the I3C communication protocol.

6. The apparatus of claim 1 , wherein in response to a comparison result in which the slave address matches a second slave address in the set of slave addresses, the electronic circuitry is to:
identify a hardware register corresponding to the slave address; and
transfer the data to or from the hardware register in association with the transaction command, using the second communication protocol as the selected communication protocol, wherein the second communication protocol comprises an I2C communication protocol.

7. The apparatus of claim 1 , wherein in response to a comparison result in which the slave address fails to match a second slave address in the set of slave addresses, the electronic circuitry is to:
ignore the transaction command.

8. The apparatus of claim 1 , wherein the electronic circuitry is to:
receive a second transaction command, wherein the second transaction command is a dummy command, wherein a message payload of the dummy command comprises a null command; and
identify, as the selected communication protocol, an I3C communication protocol in response to receiving the second transaction command.

9. An apparatus comprising:
electronic circuitry,
wherein the electronic circuitry is to:
determine a communication protocol for communicating with a target device as either a first communication protocol or a second communication protocol;
select, based on the determined communication protocol, a slave address that identifies the target device, from among a plurality of target devices, and which the target device uses to determine to respond to a transaction command according to the determined communication protocol, wherein the slave address is selected from a set of slave addresses in an address table that contains an indication of whether each slave address in the set of slave addresses is matched with either the first communication protocol or the second communication protocol; determine
generate the transaction command comprising the slave address; and
send the transaction command to the target device.

10. The apparatus of claim 9 , wherein determining the communication protocol comprises:
setting an I3C communication protocol as the communication protocol based on one or more criteria, wherein the one or more criteria comprises at least one of:
a target performance threshold; and
an absence or presence of data to be exchanged with the target device.

11. The apparatus of claim 9 , wherein determining the communication protocol comprises setting an I2C communication protocol as the communication protocol based on one or more criteria, wherein the communication protocol comprises a bus protocol, and wherein the one or more criteria comprises at least one of:
an error associated with reading data using a previous communication protocol;
a security parameter associated with requesting the data; and
a target use of the bus protocol in association with reading registers of the target device.

12. The apparatus of claim 9 , wherein:
determining the communication protocol comprises setting an I2C communication protocol or an I3C communication protocol as the communication protocol, wherein the communication protocol comprises a message protocol; and
the electronic circuitry is to select the slave address in response to setting the I2C communication protocol or the I3C communication protocol as the communication protocol.

13. The apparatus of claim 9 , wherein:
determining the communication protocol comprises setting an I3C communication protocol as the communication protocol; and
the electronic circuitry is to transmit a second transaction command in response to setting the I3C communication protocol as the communication protocol, wherein the second transaction command is a dummy command.

14. A system comprising:
a communication bus;
a controller device to generate a transaction command comprising a slave address; and
a target device,
wherein the controller device and the target device transition between using a first communication protocol comprising a message protocol and a second communication protocol comprising a bus protocol to communicate over the communication bus,
wherein the target device is to:
compare the slave address to a set of slave addresses in an address table that contains an indication of whether each slave address in the set of slave addresses is matched with either the first communication protocol or the second communication protocol;
determine, based on the comparison, a selected communication protocol for responding to the transaction command as either the first communication protocol or the second communication protocol;
generate data associated with the transaction command; and
send the data to the controller device over the communication bus using the selected communication protocol.

Assignees

• Mellanox Technologies Ltd

Inventors

• Haramaty Zachy
• Rothbaum Yehezkel
• Solomon Amit
• Givony Shahar
• Hasson Aviv

Classifications

• G06F2213/0016

  Inter-integrated circuit (I2C) · CPC title

• G06F13/4282 Primary

  on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title