Recovery of retired memory blocks in a memory device

US12353292B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12353292-B2
Application numberUS-202318357746-A
CountryUS
Kind codeB2
Filing dateJul 24, 2023
Priority dateMar 27, 2023
Publication dateJul 8, 2025
Grant dateJul 8, 2025

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A memory block recovery process is used to review and recover memory blocks of a memory device that have potentially been misidentified as bad blocks. The memory block recovery process is initiated when a threshold number of entries in a failed memory block list is exceeded. During the memory block recovery process, the failed memory block list is analyzed to determine whether there is any correlation between memory blocks that failed programming operations and memory blocks that were programmed prior to the memory block failing its programming operation. If there is a correlation, an independent program operation is performed on each memory block that failed its programming operation. If the independent programming operation on the memory block is successful, the memory block is reclaimed and the prior programmed memory block is identified as a bad block.

First claim

Opening claim text (preview).

What is claimed is: 1. A method, comprising: identifying a currently programmed memory block in a memory device and a previously programmed memory block in the memory device, the previously programmed memory block being associated with the currently programmed memory block; based on detecting a program failure on the currently programmed memory block: storing a first memory block identifier associated with the currently programmed memory block and a second memory block identifier associated with the previously programmed memory block as an entry in a failed memory block list; and identifying the currently programmed memory block as a failed memory block; and based on determining that a number of entries in the failed memory block list exceed a threshold: determining whether the second memory block identifier associated with the previously programmed memory block is included in the failed memory block list multiple times; and based on determining the second memory block identifier associated with the previously programmed memory block is included in the failed memory block list multiple times, initiating a memory block recovery process on the currently programmed memory block. 2. The method of claim 1 , wherein identifying the currently programmed memory block as a failed memory block comprises: performing a garbage collection process on the currently programmed memory block; and retiring the currently programmed memory block. 3. The method of claim 1 , wherein initiating the memory block recovery process on the currently programmed memory block comprises: performing an independent program operation on the currently programmed memory block; determining whether the independent program operation on the currently programmed memory block is successful; and based on determining the independent program operation on the currently programmed memory block is successful, identifying the currently programmed memory block as a valid memory block. 4. The method of claim 1 , further comprising resetting the entries in the failed memory block list. 5. The method of claim 1 , further comprising: determining whether the memory block recovery process is successful; and based on determining the memory block recovery process is successful, identifying the previously programmed memory block as a failed memory block. 6. The method of claim 5 , further comprising relocating data stored by the previously programmed memory block to another memory block. 7. The method of claim 1 , wherein the first memory block identifier is a physical address associated with the currently programmed memory block and wherein the second memory block identifier is a physical address associated with the previously programmed memory block. 8. The method of claim 1 , wherein the previously programmed memory block stores control information and wherein the currently programmed memory block stores received data. 9. The method of claim 1 , wherein the currently programmed memory block and the previously programmed memory block are associated with one of: a plane of a memory die of the memory device, and a metablock that spans multiple memory dies of the memory device. 10. The method of claim 1 , further comprising resetting a counter associated with the failed memory block list, the counter indicating the number of entries in the failed memory block list. 11. A data storage device, comprising: one or more memory dies; and a controller communicatively coupled to the one or more memory dies and operable to: identify a first memory block of the one or more memory dies and a second memory block of the one or more memory dies, the first memory block and the second memory block being associated with each other based, at least in part, on a programming operation; detect a failure of the programming operation on the first memory block; based on detecting the failure: store a first identifier associated with the first memory block and a second identifier associated with the second memory block as an entry in a list of failed memory blocks; and identify the first memory block as a failed memory block; and based on a determination that a number of entries in the list of failed memory blocks exceed a threshold: determine whether the second identifier associated with the second memory block is included in the list of failed memory blocks multiple times; and based on a determination that the second identifier associated with the second memory block is included in the list of failed memory blocks multiple times, initiate a memory block recovery process on the first memory block. 12. The data storage device of claim 11 , wherein identifying the first memory block as a failed memory block comprises: performing a garbage collection process on the first memory block; and retiring the first memory block. 13. The data storage device of claim 11 , wherein initiating the memory block recovery process on the first memory block comprises: performing a program operation on the first memory block; determining whether the program operation is successful; and based on a determination that the program operation on the first memory block is successful, identifying the first memory block as a valid memory block. 14. The data storage device of claim 11 , wherein the controller is further operable to reset one or more of: the entries in the list of failed memory blocks, and a counter that indicates the number of entries in the list of failed memory blocks. 15. The data storage device of claim 11 , wherein the controller is further operable to: determine whether the memory block recovery process is successful; and based on a determination that the memory block recovery process is successful, identify the second memory block as a failed memory block. 16. The data storage device of claim 15 , wherein the controller is operable to cause data stored by the second memory block to be relocated to another memory block. 17. The data storage device of claim 11 , wherein the second memory block stores control information and wherein the first memory block stores received data. 18. The data storage device of claim 11 , wherein the first memory block and the second memory block are associated with one of: a plane of the one or more memory dies, and a metablock that spans multiple memory dies. 19. A non-volatile storage device, comprising: a controller; one or more memory dies; and means for initiating a memory recovery process on a first memory means associated with the one or more memory dies and a second memory means associated with the one or more memory dies based, at least in part, on a determination that each of the first memory means and the second memory means failed a programming operation after being associated with a third memory means. 20. The non-volatile storage device of claim 19 , wherein the means for initiating the memory recovery process further includes: means for performing a first program operation on the first memory means and a second program operation on the second memory means; means for determining whether at least one of the first program operation and the second program operation is successful; and means for identifying at least one of the first memory means and the second memory means as a valid memory means based, at least in part, that at least one of the first program operation and the second program operation was successful.

Assignees

Inventors

Classifications

  • Cleaning, compaction, garbage collection, erase control · CPC title

  • Management of the backup or restore process · CPC title

  • in block erasable memory, e.g. flash memory · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US12353292B2 cover?
A memory block recovery process is used to review and recover memory blocks of a memory device that have potentially been misidentified as bad blocks. The memory block recovery process is initiated when a threshold number of entries in a failed memory block list is exceeded. During the memory block recovery process, the failed memory block list is analyzed to determine whether there is any corr…
Who is the assignee on this patent?
Sandisk Technologies Inc
What technology area does this patent fall under?
Primary CPC classification G06F11/1458. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jul 08 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).