Array substrate, display device, and drive-for-heating method for display device

Patent metadata

Field	Value
Publication number	US-12353086-B2
Application number	US-202318564590-A
Country	US
Kind code	B2
Filing date	Feb 28, 2023
Priority date	Feb 28, 2023
Publication date	Jul 8, 2025
Grant date	Jul 8, 2025

Abstract

An array substrate, a display device, and a drive-for-heating method for the display device. The array substrate includes: pixel units on a first base substrate; a data line on the first base substrate; a touch signal line on the first base substrate; a heating element on the first base substrate, and configured to generate heat under driving of a drive-for-heating current; a common electrode on the first base substrate and reused as a touch electrode; and a pixel electrode on the first base substrate. The thin film transistor includes an active layer in a semiconductor layer and a gate electrode in a first conductive layer. The data line is in a second conductive layer, one of the pixel electrode and the common electrode is in a third conductive layer, and a layer where the heating element is located is between the semiconductor layer and the third conductive layer.

First claim

What is claimed is:

1. An array substrate, comprising:
a first base substrate;
a plurality of pixel units on the first base substrate, wherein the plurality of pixel units are arranged in an array in a first direction and a second direction, at least one of the plurality of pixel units comprises a pixel driving circuit, and the pixel driving circuit comprises at least one thin film transistor;
at least one data line on the first base substrate;
at least one touch signal line on the first base substrate;
a heating element on the first base substrate, wherein the heating element is configured to generate heat under a driving of a drive-for-heating current;
a common electrode on the first base substrate, wherein the common electrode is reused as a touch electrode, and the touch electrode is electrically connected to the touch signal line; and
a pixel electrode on the first base substrate, wherein the pixel electrode is electrically connected to the data line through the pixel driving circuit,
wherein the array substrate comprises: a semiconductor layer on the first base substrate; a first conductive layer on a side of the semiconductor layer away from the first base substrate; a second conductive layer on a side of the first conductive layer away from the first base substrate; a third conductive layer on a side of the second conductive layer away from the first base substrate; and a fourth conductive layer on a side of the third conductive layer away from the first base substrate,
wherein the at least one thin film transistor comprises an active layer and a gate electrode, the active layer is in the semiconductor layer, the gate electrode is in the first conductive layer, the data line is in the second conductive layer, one of the pixel electrode and the common electrode is in the third conductive layer, and the other of the pixel electrode and the common electrode is in the fourth conductive layer,
wherein a layer in which the heating element is located is between the semiconductor layer and the third conductive layer,
wherein the array substrate further comprises a gate line provided on the first base substrate, and the heating element comprises a plurality of first heating wires, and the plurality of first heating wires and the gate line are in the first conductive layer,
wherein a plurality of gate lines extend in the first direction and are spaced apart in the second direction, and the plurality of first heating wires extend in the first direction and are spaced apart in the second direction, and any two of the plurality of first heating wires and the plurality of gate lines are spaced apart in the second direction,
wherein each of the at least one data line comprises a first data line portion, a second data line portion, and a third data line portion between the first data line portion and the second data line portion, the first data line portion extends in a third direction intersecting with the second direction, and the second data line portion extends in a fourth direction intersecting with the second direction, and
wherein an orthographic projection of at least one of the plurality of first heating wires on the first base substrate overlaps at least partially with an orthographic projection of at least one third data line portion on the first base substrate.

2. The array substrate according to claim 1 , wherein the heating element further comprises a plurality of second heating wires, and the plurality of second heating wires and the data line are in the second conductive layer.

3. The array substrate according to claim 1 , wherein at least one pixel unit of the plurality of pixel units comprises a plurality of sub-pixels, and the orthographic projection of at least one first heating wire on the first base substrate extends through an orthographic projection of a plurality of the third data line portions of a row of sub-pixels on the first base substrate.

4. The array substrate according to claim 1 , wherein:
the plurality of first heating wires and the plurality of gate lines are alternately arranged in the second direction; and/or
a ratio of a number of the plurality of first heating wires to a number of the plurality of gate lines is 1:1.

5. The array substrate according to claim 2 , wherein a plurality of data lines are spaced apart in the first direction,
wherein the plurality of second heating wires are spaced apart in the first direction, and any two of the plurality of second heating wires and the plurality of data lines are spaced apart in the first direction,
wherein a plurality of touch signal lines are spaced apart in the first direction, and
wherein any two of the plurality of second heating wires, the plurality of data lines and the plurality of touch signal lines are spaced apart in the first direction.

6. The array substrate according to claim 5 , wherein the pixel unit comprises N sub-pixels, the at least one data line is configured to provide data signals to the pixel driving circuits of a column of sub-pixels, and the touch signal line is electrically connected to touch electrodes of N columns of sub-pixels, wherein N is greater than or equal to 2, and
wherein N data lines and/or one touch signal line are/is arranged in the first direction between any two adjacent second heating wires among the plurality of second heating wires.

7. The array substrate according to claim 5 , wherein each second heating wire comprises a first heating wire portion, a second heating wire portion, and a third heating wire portion between the first heating wire portion and the second heating wire portion, the first heating wire portion extends in a third direction intersecting with the second direction, and the second heating wire portion extends in a fourth direction intersecting with the second direction.

8. The array substrate according to claim 1 , wherein the array substrate comprises a display region and a peripheral region, the plurality of pixel units are in the display region, the array substrate comprises a first side, a second side, a third side, and a fourth side, the first side and the second side are opposite to each other, and the third side and the fourth side are opposite to each other,
wherein the array substrate further comprises a gate driving circuit and a data driving circuit in the peripheral region, the gate driving circuit is on at least one of the first side or the second side of the array substrate, and the data driving circuit is on the third side of the array substrate, and
wherein the array substrate further comprises a heating element binding region in the peripheral region, the heating element binding region is on a side of the gate driving circuit away from the display region, and the plurality of first heating wires extend to the heating element binding region.

9. The array substrate according to claim 1 , wherein the array substrate comprises a display region and a peripheral region, the plurality of pixel units are in the display region, the array substrate comprises a first side, a second side, a third side, and a fourth side, the first side and the second side are opposite to each other, and the third side and the fourth side are opposite to each other,
wherein the array substrate further comprises a gate driving circuit and a data driving circuit in the peripheral region, the gate driving circuit is on at least one of the first side or the second side of the array substrate, and the data driving circuit is on the third side of the array substrate, and
wherein the array substrate further comprises a heating element binding region in the peripheral region, the heating element binding region is on the third side of the array substrate, the array substrate further comprises at leas

Assignees

• Beijing Boe Display Tech Co
• Boe Technology Group Co Ltd

Inventors

• Li Pengtao
• Han Rui
• Liu Peng
• Wang Chunhua
• Dong Xiaoqiao
• Fu Qi
• Liu Tiantian
• Pan Qiannan
• Wang Xiaoxia
• Wang Yang
• Xing Xiwang
• Yu Jie
• Cui Dong
• Ma Qing
• Yoon Daekeun
• Cai Site
• Li Biqi

Classifications

• G02F1/1368

  in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title

• G02F1/136286 Primary

  Wiring, e.g. gate line, drain line · CPC title

• G02F1/13338

  Input devices, e.g. touch panels · CPC title

• G02F1/133382 Primary

  Heating or cooling of liquid crystal cells other than for activation, e.g. circuits or arrangements for temperature control, stabilisation or uniform distribution over the cell · CPC title

• G02F1/1343

  Electrodes {(reflective electrodes G02F1/133553)} · CPC title