Display substrate and display apparatus

Patent metadata

Field	Value
Publication number	US-12349554-B2
Application number	US-202117762956-A
Country	US
Kind code	B2
Filing date	Jun 3, 2021
Priority date	Jun 11, 2020
Publication date	Jul 1, 2025
Grant date	Jul 1, 2025

Abstract

A display substrate has a display region, a peripheral region surrounding the display region, and pad regions on a first connection side of the peripheral region and distal to the display region. The display region includes sub-pixel regions. The display substrate further includes: a base, and organic light-emitting diodes and a first power supply line all on the base. The organic light-emitting diodes are provided in the sub-pixel regions, respectively. A cathode of each organic light-emitting diode extends from the display region to the peripheral region and is connected to the first power supply line in the peripheral region. The first connection side includes a first connection region corresponding to a position between two adjacent pad regions, and a second connection region other than the first connection region. A connection region between the first power supply line and the cathode covers at least part of the second connection region.

First claim

What is claimed is:

1. A display substrate, having a display region, a peripheral region surrounding the display region, and a plurality of pad regions on a first connection side of the peripheral region and distal to the display region; wherein the display region comprises a plurality of sub-pixel regions; and the display substrate further comprises: a base, and organic light-emitting diodes and a first power supply line that are on the base; wherein
the organic light-emitting diodes are provided in the plurality of sub-pixel regions, respectively; and a cathode of each organic light-emitting diode extends from the display region to the peripheral region and is directly connected to the first power supply line in the peripheral region;
the first connection side of the peripheral region comprises a first connection region corresponding to a position between two adjacent pad regions, and a second connection region other than the first connection region; and
a connection region between the first power supply line and the cathode covers at least part of the second connection region.

2. The display substrate according to claim 1 , wherein the second connection region comprises a first sub-connection region corresponding to each of the pad regions, and a second sub-connection region other than the first sub-connection region; and the connection region between the first power supply line and the cathode covers the first sub-connection region and the second sub-connection region.

3. The display substrate according to claim 1 , wherein the display substrate further comprises a thin film transistor on the base and disposed in each sub-pixel region; and
the first power supply line is disposed in the same layer and made of the same material as a source electrode and a drain electrode of the thin film transistor.

4. The display substrate according to claim 3 , further comprising a second power supply line in the peripheral region, and a second power supply lead-out wire connected to the second power supply line; wherein
the second power supply line is provided on a side of the first power supply line proximal to the display region; and
the second power supply line and the second power supply lead-out wire are disposed in the same layer and made of the same material as a gate electrode of the thin film transistor.

5. The display substrate according to claim 4 , wherein the first power supply line is disconnected at a position near the second power supply lead-out wire; and
the second power supply lead-out wire is located between two adjacent portions of the disconnected first power supply line.

6. The display substrate according to claim 5 , wherein one end of each of the two adjacent portions of the first power supply line is connected to a first power supply lead-out wire; and
the first power supply lead-out wire is disposed in the same layer and made of the same material as the second power supply lead-out wire.

7. The display substrate according to claim 3 , further comprising a transfer electrode configured to connect the drain electrode of the thin film transistor to an anode of the organic light-emitting diode; wherein
the first power supply line comprises a first sub-power supply line, a second sub-power supply line, and an insulation layer between the first sub-power supply line and the second sub-power supply line; the first sub-power supply line is connected to the second sub-power supply line through a lap via penetrating through the insulation layer; and
the first sub-power supply line is disposed in the same layer and made of the same material as both the source electrode and the drain electrode of the thin film transistor; and the second sub-power supply line is disposed in the same layer and made of the same material as the transfer electrode.

8. The display substrate according to claim 7 , wherein the first sub-power supply line is disconnected at a position near the second power supply lead-out wire; and
the second power supply lead-out wire is located between two adjacent portions of the disconnected first sub-power supply line.

9. The display substrate according to claim 3 , wherein the thin film transistor comprises only a first gate electrode; and
the second power supply line and the second power supply lead-out wire are disposed in the same layer and made of the same material as the first gate electrode of the thin film transistor.

10. The display substrate according to claim 3 , wherein the thin film transistor comprises a first gate electrode and a second gate electrode disposed opposite to each other, and an insulation layer between the first gate electrode and the second gate electrode; and
the second power supply line and the second power supply lead-out wire are disposed in the same layer and made of the same material as the first or second gate electrode of the thin film transistor.

11. The display substrate according to claim 1 , wherein a portion of the cathode is directly on the first power supply line, to form a direct connection between the first power supply line and the cathode.

12. The display substrate according to claim 1 , further comprising a planarization layer, a pixel defining layer, and a black matrix sequentially disposed between the first power supply line and the cathode, and a lap via penetrating through the planarization layer, the pixel defining layer, and the black matrix, wherein
the first power supply line is connected to the cathode through the lap via.

13. The display substrate according to claim 7 , further comprising a passivation layer, a pixel defining layer, and a black matrix sequentially disposed between the first power supply line and the cathode, and a lap via penetrating through the passivation layer, the pixel defining layer, and the black matrix, wherein
the first power supply line is connected to the cathode through the lap via.

14. The display substrate according to claim 7 , further comprising a planarization layer between the drain electrode of the thin film transistor and the anode of the organic light-emitting diode, and a first via penetrating through the planarization layer, wherein
the drain electrode of the thin film transistor is connected to the anode of the organic light-emitting diode through the first via.

15. The display substrate according to claim 14 , further comprising a passivation layer between the planarization layer and the anode of the organic light-emitting diode, and a third via penetrating through the passivation layer, wherein
the third via and the first via overlap each other and are in communication with each other in a direction perpendicular to the planarization layer or the passivation layer; and
the drain electrode of the thin film transistor is connected to the anode of the organic light-emitting diode through the first via and the third via.

16. A display apparatus, comprising the display substrate according to claim 1 .

17. The display apparatus according to claim 16 , further comprising a plurality of first pads and a plurality of second pads disposed in the pad regions; wherein
the plurality of first pads are in one-to-one correspondence with a plurality of first power supply lead-out wires; and
the plurality of second pads are in one-to-one correspondence with a plurality of second power supply lead-out wires.

18. The display apparatus according to claim 17 , further comprising a plurality of chip on films, and a plurality of third pads on each of the plurality of chip on films; wherein
one of the first pads and one of the second pads,

Assignees

• Chengdu Boe Optoelect Tech Co
• Boe Technology Group Co Ltd

Inventors

• Chen Wenbo
• Zhang Bing
• Fan Mengyue
• Chen Chenyu
• Yang Zhongliu
• Zhao Shuang
• Lu Hongting
• Yang Jing
• Ren Yanping

Classifications

• H10K59/8052

  Cathodes · CPC title

• H10K59/1213

  the pixel elements being TFTs · CPC title

• H10K59/122

  Pixel-defining structures or layers, e.g. banks · CPC title

• H10K50/865

  comprising light absorbing layers, e.g. light-blocking layers · CPC title

• H10K59/1315 Primary

  comprising structures specially adapted for lowering the resistance · CPC title