Lateral transistor with self-aligned body implant

Patent metadata

Field	Value
Publication number	US-12347688-B2
Application number	US-202418401957-A
Country	US
Kind code	B2
Filing date	Jan 2, 2024
Priority date	Jun 30, 2020
Publication date	Jul 1, 2025
Grant date	Jul 1, 2025

Abstract

A lateral high-voltage transistor includes a semiconductor substrate, a body region formed by dopant implantation in the semiconductor substrate, the body region having a lateral boundary, a dielectric layer arranged over the semiconductor substrate, and a structured gate layer arranged over the dielectric layer. The structured gate layer overlaps the body region in the semiconductor substrate in a zone between the lateral boundary of the body region and a gate edge of the structured gate layer. The lateral boundary of the body region is a boundary defined by dopant implantation.

First claim

What is claimed is:

1. A lateral transistor, comprising:
a semiconductor substrate;
a body region formed by dopant implantation in the semiconductor substrate, the body region having a lateral boundary;
a dielectric layer arranged over the semiconductor substrate; and
a structured gate layer arranged over the dielectric layer,
wherein the structured gate layer overlaps the body region in the semiconductor substrate in a zone between the lateral boundary of the body region and a gate edge of the structured gate layer,
wherein the lateral boundary of the body region is a boundary defined by dopant implantation,
wherein a lower boundary of the body region in the semiconductor substrate has a stepped profile, and wherein a length of the stepped profile corresponds to the length of the zone.

2. The lateral transistor of claim 1 , wherein a length of the zone is between 80 nm and 140 nm.

3. The lateral transistor of claim 1 , wherein the dielectric layer comprises implantation damage in a region overlaying the body region.

4. The lateral transistor of claim 1 , wherein the zone forms a channel of the lateral transistor.

5. The lateral transistor of claim 1 , further comprising:
a source region formed in the body region, wherein the source region is of a first doping type and the dopant implanted in the body region is of a second doping type.

6. The lateral transistor of claim 5 , further comprising:
a low-resistance region of the second doping type adjoining the source region in the body region.

7. The lateral transistor of claim 5 , further comprising:
a drain region in the semiconductor substrate; and
a drift region of the first doping type arranged above the drain region in the semiconductor substrate.

Assignees

• Infineon Tech Dresden Gmbh & Co Kg

Inventors

• Gratz Achim
• FAUL JüRGEN
• Pandey Swapnil

Classifications

• H10P30/212

  Through-implantation · CPC title

• H10P30/204

  into Group IV semiconductors · CPC title

• H10P30/22

  using masks · CPC title

• H10P30/20 Primary

  into semiconductor materials, e.g. for doping · CPC title

• H10D30/603

  having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended drain IGFETs [EDMOS] · CPC title