Time to digital converter

Patent metadata

Field	Value
Publication number	US-12345834-B2
Application number	US-202318390534-A
Country	US
Kind code	B2
Filing date	Dec 20, 2023
Priority date	Mar 30, 2020
Publication date	Jul 1, 2025
Grant date	Jul 1, 2025

Abstract

In an embodiment, a method includes: receiving a first plurality of digital codes from a time-to-digital converter (TDC); generating a coarse histogram from the first plurality of digital codes; detecting a peak coarse bin from the plurality of coarse bins; after receiving the first plurality of digital codes, receiving a second plurality of digital codes from the TDC; and generating a fine histogram from the second plurality of digital codes based on the detected peak coarse bin, where a fine histogram depth range is narrower than a coarse histogram depth range, where a lowest fine histogram depth is lower or equal to a lowest coarse peak depth, and where a highest fine histogram depth is higher or equal to a highest coarse peak depth.

First claim

The invention claimed is:

1. A method, comprising:
performing, using a time-to-digital converter (TDC) having an input coupled to a first single photon avalanche diode (SPAD) and to a second SPAD, time-to-digital conversions between emissions of radiation pulses and receptions of reflected radiation pulses by the first SPAD to provide a first plurality of digital codes, and by the second SPAD to provide a second plurality of digital codes;
generating a first coarse histogram corresponding to a first plurality of output values from the first plurality of digital codes;
determining a peak value of the first coarse histogram;
setting a window of interest based on the determined peak value for the first coarse histogram;
generating a first fine histogram corresponding to a second plurality of output values from the first plurality of digital codes, wherein the first fine histogram has a higher time resolution than the first coarse histogram;
during a first time period, reading out the first fine histogram, and, simultaneously with the reading out the first fine histogram associated with the first SPAD, performing the steps of:
generating a second coarse histogram corresponding to a first plurality of output values from the second plurality of digital codes,
determining a peak value of the second coarse histogram,
setting a window of interest based on the determined peak value for the second coarse histogram,
generating a second fine histogram corresponding to a second plurality of output values from the second plurality of digital codes; and
during a second time period different from the first time period, reading out the second fine histogram, and, simultaneously with the reading out the second fine histogram, performing the steps of generating the first coarse histogram, determining the peak value of the first coarse histogram, setting the window of interest based on the determined peak value for the first coarse histogram, and generating the first fine histogram.

2. The method of claim 1 , wherein generating the first coarse histogram comprises:
determining whether an output value of the first plurality of output values is within the window of interest based on the determined park value for the first coarse histogram,
in response to a determination that the output value of the first plurality of output values is within the window of interest based on the determined peak value for the first coarse histogram, incrementing a count of a histogram bin associated with the output value.

3. The method of claim 1 , further comprising, after setting the window of interest based on the determined peak value for the first coarse histogram and before generating the first fine histogram:
generating a medium resolution histogram from a third plurality of output values from the first plurality of digital codes;
determining a peak value of the medium resolution histogram; and
setting a window of interest based on the determined peak value for the medium resolution histogram, wherein the medium resolution histogram has a higher time resolution than the first coarse histogram and a lower resolution than the first fine histogram.

4. A circuit comprising:
a time-to-digital converter (TDC) configured to be coupled to a first group of photodetectors and to a second group of photodetectors different from the first group of photodetectors;
a histogram generation circuit; and
a control circuit, wherein the histogram generation circuit is configured to cooperate with the control circuit to:
generate a coarse histogram from a first plurality of output values from the TDC,
determine a peak value of the coarse histogram,
set a window of interest of the histogram generation circuit associated with the TDC based on the determined peak value for the coarse histogram,
generate a fine histogram from a second plurality of output values from the TDC within the window of interest of the determined peak value, wherein the fine histogram has a higher time resolution than the coarse histogram,
during a first time period, reading out the fine histogram associated with the first group of photodetectors, and, simultaneously with the reading out the fine histogram associated with the first group of photodetectors, performing the steps of generating the coarse histogram, determining the peak value of the coarse histogram, and generating the fine histogram associated with the second group of photodetectors different from the first group of photodetectors, and
during a second time period different from the first time period, reading out the fine histogram associated with the second group of photodetectors, and, simultaneously with the reading out the fine histogram associated with the second group of photodetectors, performing the steps of generating the coarse histogram, determining the peak value of the coarse histogram, and generating the fine histogram associated with the first group of photodetectors.

5. The circuit of claim 4 , wherein the histogram generation circuit is configured to:
determine whether an output value of the TDC is within the window of interest; and
in response to a determination that the output value of the TDC is within the window of interest, increment a count of a histogram bin associated with the output value.

6. The circuit of claim 4 , wherein the control circuit is further configured to cooperate with histogram generation circuit to, after setting the window of interest based on the determined peak value for the coarse histogram and before generating the fine histogram:
generate a medium resolution histogram from a third plurality of output values from the TDC;
determine a peak value of the medium resolution histogram; and
set a window of interest based on the determined peak value for the medium resolution histogram, wherein the medium resolution histogram has a higher time resolution than the coarse histogram and a lower resolution than the fine histogram.

7. The circuit of claim 6 , wherein:
during the first time period, reading out the fine histogram associated with the first group of photodetectors is performed simultaneously with performing the steps of generating the coarse histogram, determining the peak value of the coarse histogram, generating the medium resolution histogram, determining the peak value of the medium resolution histogram, and generating the fine histogram associated with the second group of photodetectors different from the first group of photodetectors; and
during the second time period, reading out the fine histogram associated with the second group of photodetectors is performed simultaneously with the reading out the fine histogram associated with the second group of photodetectors, performing the steps of generating the coarse histogram, determining the peak value of the coarse histogram, generating the medium resolution histogram, determining the peak value of the medium resolution histogram, and generating the fine histogram associated with the first group of photodetectors.

8. The circuit of claim 4 , further comprising a logic circuit coupled between an input of the TDC and outputs of the first group of photodetectors and the second group of photodetectors.

9. The circuit of claim 8 , wherein the logic circuit comprises an OR tree having a plurality of inputs respectively coupled to the first group of photodetectors and the second group of photodetectors.

10. A system comprising:
a pixel array arranged in N rows and M columns, wherein N is a positive integer greater than 1, and wherein M is a positive integer greater than 1, and wherein each pixel comprises a single photon avalanche diode (SPAD);
a plurality of time-to-digital converters (TDCs), wherein each

Assignees

• St Microelectronics Res & Dev Ltd

Inventors

• Dutton Neale
• Moore John Kevin

Classifications

• G01S17/89

  for mapping or imaging · CPC title

• G01S17/10

  using transmission of interrupted, pulse-modulated waves (determination of distance by phase measurements G01S17/32) · CPC title

• G01S7/4873

  by deriving and controlling a threshold value · CPC title

• G01S17/894

  Three-dimensional [3D] imaging with simultaneous measurement of time-of-flight at a two-dimensional [2D] array of receiver pixels, e.g. time-of-flight cameras or flash lidar · CPC title

• G01S7/4865 Primary

  Time delay measurement, e.g. time-of-flight measurement, time of arrival measurement or determining the exact position of a peak (peak detection in noise, signal conditioning G01S7/487) · CPC title