Wafer inspection method and inspection apparatus

US12345741B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12345741-B2
Application numberUS-202217956301-A
CountryUS
Kind codeB2
Filing dateSep 29, 2022
Priority dateOct 1, 2021
Publication dateJul 1, 2025
Grant dateJul 1, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

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A wafer inspection method and inspection apparatus that perform a voltage inspection of a die on a wafer by a probe module. The probe module includes a processing module, a first probe coupled to a first electrode point of the die, and a second probe coupled to a second electrode point of the die. The first probe is coupled to the processing module, and the second probe is grounded. The processing module provides the die with a driving current through the first probe, and obtains an inspection voltage corresponding to the die. The processing module generates an inspection result of the inspection voltage based on two reference voltages respectively representing a high critical threshold value and a low critical threshold value of the die under a normal operation. The inspection result indicates an operating status of the die. Thus, inspection costs are reduced and inspection efficiency is enhanced.

First claim

Opening claim text (preview).

What is claimed is: 1. A wafer inspection apparatus, comprising: a probe module, comprising a first probe, a second probe and a processing module, the first probe provided to couple to a first electrode point of a die on a wafer, the second probe provided to couple to a second electrode point of the die on the wafer, the first probe coupled to the processing module, the second probe being grounded; wherein, the processing module provides the die with a driving current through the first probe and the first electrode point, obtains a corresponding inspection voltage when the die is driven, and generates an inspection result of the inspection voltage based on at least two reference voltages, wherein, the two reference voltages respectively represent a high critical threshold value and a low critical threshold value of the die, and by separately comparing the inspection voltage with each of the two reference voltages, two corresponding comparison results are obtained, wherein the two comparison results are used to determine which category among a plurality of categories the die belongs to, thereby defining the inspection result, wherein the categories include a first category where the inspection voltage is greater than the low critical threshold and less than the high critical threshold, and a second category where the inspection voltage is greater than or equal to the high critical threshold or less than or equal to the low critical threshold, wherein the processing module comprises: a driver, coupled to the first probe and providing the driving current; a comparing unit, coupled to the first probe, and configured to obtain the inspection voltage and compare the inspection voltage with each of the two reference voltages respectively to obtain the two comparison results; and a logic element, coupled to the comparing unit, and configured to store the two comparison results and define the inspection result based on whether the die belongs to the first category or the second category, wherein the die is determined as being in a normal state when belonging to the first category and in an abnormal state when belonging to the second category. 2. The wafer inspection apparatus according to claim 1 , wherein the comparing unit has a first comparator and a second comparator connected in parallel, output terminals of the first comparator and the second comparator are coupled to the logic element, a first input terminal of the first comparator is coupled to the first probe, a first input terminal of the second comparator is coupled to the first probe, a second input terminal of the first comparator has one of the two reference voltages, and a second input terminal of the second comparator has the other of the two reference voltages. 3. A wafer inspection method, comprising: a preparation step of providing a probe module, wherein the probe module comprises a first probe, a second probe and a processing module, the first probe is coupled to the processing module, and the second probe is grounded, and the processing module comprises a driver, a comparing unit and a logic element; an initial route establishing step of coupling the first probe to a first electrode point of a die on a wafer, and coupling the second probe to a second electrode point of the die, so that the die is disposed in a test loop between the processing module and the ground; and an inspection step of providing a driving current through the first probe and the first electrode point to the die disposed in the test loop by the driver of the processing module, obtaining a corresponding inspection voltage of the die by the comparing unit of the processing module, and generating an inspection result of the inspection voltage based on two reference voltages by the logic element of the processing module, wherein, the two reference voltages respectively represent a high critical threshold value and a low critical threshold value of the die, and by separately comparing the inspection voltage with each of the two reference voltages, two corresponding comparison results are obtained, wherein the two comparison results are used to determine which category among a plurality of categories the die belongs to, thereby defining the inspection result, wherein the categories include a first category where the inspection voltage is greater than the low critical threshold and less than the high critical threshold, and a second category where the inspection voltage is greater than or equal to the high critical threshold or less than or equal to the low critical threshold, wherein the logic element is coupled to the comparing unit to store the two comparison results and define the inspection result based on whether the die belongs to the first category or the second category, wherein the die is determined as being in a normal state when belonging to the first category and in an abnormal state when belonging to the second category.

Assignees

Inventors

Classifications

  • Wafer Test · CPC title

  • Provision in measuring instruments for reference values, e.g. standard voltage, standard waveform · CPC title

  • Input circuits therefor · CPC title

  • Contacting devices, e.g. sockets, burn-in boards or mounting fixtures (in general G01R1/04) · CPC title

  • Features relating to contacting the IC under test, e.g. probe heads; chucks (G01R31/2865 takes precedence, test connections, e.g. test sockets, or probes per se, G01R1/04 or G01R1/06) · CPC title

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What does patent US12345741B2 cover?
A wafer inspection method and inspection apparatus that perform a voltage inspection of a die on a wafer by a probe module. The probe module includes a processing module, a first probe coupled to a first electrode point of the die, and a second probe coupled to a second electrode point of the die. The first probe is coupled to the processing module, and the second probe is grounded. The process…
Who is the assignee on this patent?
Chroma Ate Inc
What technology area does this patent fall under?
Primary CPC classification G01R1/07385. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jul 01 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).