Electro-optical device

Patent metadata

Field	Value
Publication number	US-12340774-B2
Application number	US-202418633011-A
Country	US
Kind code	B2
Filing date	Apr 11, 2024
Priority date	Oct 23, 2007
Publication date	Jun 24, 2025
Grant date	Jun 24, 2025

Abstract

An electro-optical device is provided and includes a plurality of first signal lines extending in a first direction on a substrate; a plurality of second signal lines extending in a second direction on the substrate, the second direction intersecting the first direction; a pixel area in which a plurality of pixel electrodes are disposed; an outer peripheral edge of the pixel area having a curved portion or a bent portion; and a first circuit block, a second circuit block, and a third circuit block arranged along the outer peripheral edge, wherein the second circuit block is arranged between the first circuit block and the first circuit block, and a first gap between the first circuit bock and the second circuit block is different from a second gap between the second circuit block and the third circuit block.

First claim

The invention claimed is:

1. An electro-optical device comprising:
a substrate;
a pixel area with an outer peripheral edge including a curved portion;
pixels in the pixel area;
a first gate line and a second gate line, each connected to a corresponding one of the pixels on the substrate;
a first circuit block and a second circuit block which are arranged outside the pixel area and along the curved portion of the pixel area;
a first relay line and a first output line connecting the first gate line and the first circuit block, the first circuit block, the first output line, the first relay line, and the first gate line are connected in the order as listed; and
a second relay line and a second output line connecting the second gate line and the second circuit block, the second circuit block, the second output line, the second relay line, and the second gate line are connected in the order as listed,
wherein both the first circuit block and the second circuit block include a shift register and a buffer,
both the first circuit block and the second circuit block are connected to a corresponding one of the first and second output lines,
the first relay line extends from the first output line to the first gate line in a first direction,
the second relay line extends from the second output line to the second gate line in a second direction, and
the first direction is opposite to the second direction.

2. The electro-optical device according to claim 1 , wherein
the first direction is parallel to the second direction.

3. The electro-optical device according to claim 1 , wherein
a length of the first relay line is different from a length of the second relay line.

4. The electro-optical device according to claim 1 , further comprising a third gate line connected to a corresponding one of the pixels, wherein
the third gate line is disposed between the first gate line and the second gate line.

5. The electro-optical device according to claim 1 , further comprising third gate lines each connected to a corresponding one of the pixels, wherein
the third gate lines are disposed between the first gate line and the second gate line.

6. The electro-optical device according to claim 5 , wherein
some of the third gate lines are connected to the first circuit block, and
others of the third gate lines are connected to the second circuit block.

7. An electro-optical device comprising:
a substrate;
a pixel area with an outer peripheral edge including a curved portion;
pixels in the pixel area;
a first gate line and a second gate line, each connected to a corresponding one of the pixels on the substrate;
a circuit block arranged outside the pixel area and along the curved portion of the pixel area;
a first relay line and a first output line connecting the first gate line and the circuit block, the circuit block, the first output line, the first relay line, and the first gate line are connected in the order as listed; and
a second relay line and a second output line connecting the second gate line and the circuit block, the circuit block, the second output line, the second relay line, and the second gate line are connected in the order as listed,
wherein the circuit block includes a shift register and a buffer,
the circuit block is connected to the first and second output lines,
the first relay line extends from the first output line to the first gate line in a first direction,
the second relay line extends from the second output line to the second gate line in a second direction, and
the first direction is opposite to the second direction.

8. The electro-optical device according to claim 7 , wherein
the first direction is parallel to the second direction.

9. The electro-optical device according to claim 7 , wherein
a length of the first relay line is different from a length of the second relay line.

10. The electro-optical device according to claim 7 , further comprising a third gate line connected to a corresponding one of the pixels, wherein
the third gate line is disposed between the first gate line and the second gate line.

11. The electro-optical device according to claim 7 , further comprising third gate lines each connected to a corresponding one of the pixels, wherein
the third gate lines are disposed between the first gate line and the second gate line.

12. The electro-optical device according to claim 11 , wherein
some of the third gate lines are connected to third relay lines, respectively,
others of the third gate lines are connected to fourth relay lines, respectively,
each of the third relay lines extends to a corresponding one of the third gate lines in the first direction, and
each of the fourth relay lines extends to a corresponding one of the third gate lines in the second direction.

Assignees

• Japan Display Inc

Inventors

• Anzai Katsuya
• Kawada Hideki
• Matsuda Hiroshi
• Iwasaki Yukitada

Classifications

• G09G3/3688

  suitable for active matrices only · CPC title

• G09G3/3648

  using an active matrix (G09G3/367 - G09G3/3696 take precedence) · CPC title

• G09G3/3275

  Details of drivers for data electrodes · CPC title

• G09G3/2096

  Details of the interface to the display terminal specific for a flat panel (suitable for both CRT and flat panel G09G5/006; specific for a CRT G09G1/167) · CPC title

• H10K59/131

  Interconnections, e.g. wiring lines or terminals · CPC title