Data stream processor

Patent metadata

Field	Value
Publication number	US-12339855-B2
Application number	US-202318226334-A
Country	US
Kind code	B2
Filing date	Jul 26, 2023
Priority date	Jul 26, 2023
Publication date	Jun 24, 2025
Grant date	Jun 24, 2025

Abstract

Provided is a data stream processor comprising a streamed data transceiver interface, a structure of processing units configurable to transform data received from a data source over the streamed data transceiver interface according to a specified output requirement, and a configuration unit operable in electronic communication with a data consumer to receive an output requirement and to configure the operation and linkage of a processing unit in the structure of processing units to transform input data to output data according to the specified output requirement; wherein the structure of processing units is further operable to provide the output data for output over the streamed data transceiver interface.

First claim

The invention claimed is:

1. A data stream processor comprising:
a streamed data transceiver interface;
a structure of processing units configurable to transform data received from a data source over the streamed data transceiver interface according to a specified output requirement; and
a configuration unit operable in electronic communication with a data consumer to receive the specified output requirement and to configure operation and linkage of a processing unit in the structure of processing units to transform input data to output data according to the specified output requirement, where the configuration unit is operable to configure an instance of the structure of processing units to operate in one or more linkage configurations, including one or more of sequential, parallel and stencil;
wherein the structure of processing units is further operable to provide the output data for output over the streamed data transceiver interface; and
wherein the processing unit comprises a plurality of instruction primitive circuits operable to combine to perform at least one higher-level instruction.

2. The data stream processor according to claim 1 , wherein the transform comprises a change in data content between input data and output data.

3. The data stream processor according to claim 1 , wherein the transform comprises a change in data format between input data and output data.

4. The data stream processor according to claim 1 , wherein the transform comprises filtering the data.

5. The data stream processor according to claim 1 , wherein the transform comprises converting data to a specified format.

6. The data stream processor according to claim 1 , wherein the transform comprises tiling data for n-dimensional tiled processing.

7. The data stream processor according to claim 1 , wherein the transform comprises synchronizing timing-sensitive data.

8. The data stream processor according to claim 7 , wherein providing the output data comprises providing the output data to a further structure of processing units configurable to process data received in the specified format.

9. The data stream processor according to claim 1 , wherein providing the output data comprises providing the output data by a direct data-passing interface to a compression/decompression engine.

10. The data stream processor according to claim 1 , wherein providing the output data comprises providing the output data by a direct data-passing interface to a direct memory access controller.

11. A method of operating a data stream processor comprising:
receiving streamed data over a streamed data transceiver interface;
transforming input data received from a data source over the streamed data transceiver interface to output data, using a processing unit in a structure of processing units according to a specified output requirement; and
receiving, by a configuration unit operable in electronic communication with a data consumer, the specified output requirement and configuring operation and linkage of a processing unit in the structure of processing units to transform input data to output data according to the specified output requirement, where the configuration unit is operable to configure an instance of the structure of processing units to operate in one or more linkage configurations, including one or more of sequential, parallel and stencil; and
providing the output data from the structure of processing units for output over the streamed data transceiver interface,
wherein using the processing unit in the structure of processing units includes using a plurality of instruction primitive circuits operable to combine to perform at least one higher-level instruction.

12. The method according to claim 11 , wherein the transform comprises a change in data content.

13. The method according to claim 11 , wherein the transform comprises a change in data format.

14. The method according to claim 11 , wherein providing the output data comprises providing the output data by a direct data-passing interface to a compression/decompression engine.

15. The method according to claim 11 , wherein providing the output data comprises providing the output data by a direct data-passing interface to a direct memory access controller.

16. A computer program product stored on a non-transitory storage medium and comprising program code to cause a computer system to:
receive streamed data over a streamed data transceiver interface;
transform input data received from a data source over the streamed data transceiver interface to output data, using a processing unit in a structure of processing units according to a specified output requirement;
receive, by a configuration unit operable in electronic communication with a data consumer, the specified output requirement and configuring operation and linkage of a processing unit in the structure of processing units to transform input data to output data according to the specified output requirement, where the configuration unit is operable to configure an instance of the structure of processing units to operate in one or more linkage configurations, including one or more of sequential, parallel and stencil; and
provide the output data from the structure of processing units for output over the streamed data transceiver interface,
wherein using the processing unit in the structure of processing units comprises using a plurality of instruction primitive circuits operable to combine to perform at least one higher-level instruction.

Assignees

• Advanced Risc Mach Ltd

Inventors

• Modrzyk Damian Piotr
• Ünal Metin Gokhan
• Gabrielli Giacomo
• VENU Balaji

Classifications

• G06F16/24542 Primary

  Plan optimisation · CPC title

• G06F16/24568 Primary

  Data stream processing; Continuous queries · CPC title