Method for error injection, electronic device, and computer program product

US12339757B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12339757-B2
Application numberUS-202318221562-A
CountryUS
Kind codeB2
Filing dateJul 13, 2023
Priority dateJan 6, 2023
Publication dateJun 24, 2025
Grant dateJun 24, 2025

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

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An error injection technique involves: receiving a logic error including an injection address parameter and an injection error parameter, and matching the injection address parameter in the logic error with a request address parameter in a response to a data request in at least one workflow. The technique further involves: in a case that the injection address parameter is matched with the request address parameter, injecting the injection error parameter into the response to the data request. Such a technique provides a flexible error injection mode, which may fully test the reliability and availability of storage devices, thereby providing high-quality storage services for users.

First claim

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The invention claimed is: 1. A method for error injection, the method comprising: receiving a logic error comprising an injection address parameter and an injection error parameter; matching the injection address parameter in the logic error with a request address parameter in a response to a data request in at least one workflow; in response to that the injection address parameter is matched with the request address parameter, injecting the injection error parameter into the response to the data request; and in response to the logic error being injected into the response to the data request, updating a number of times of injection corresponding to the logic error in a logic error record. 2. The method according to claim 1 , wherein the response to the data request comprises a response returned from a buffer or a response returned from a disk manager. 3. The method according to claim 2 , wherein the injection address parameter comprises one or both of a page address in the buffer and a logic address in the disk manager. 4. The method according to claim 2 , wherein the logic error further comprises an injection component parameter, and the injection component parameter indicates that the injection address parameter corresponds to the buffer or the disk manager. 5. The method according to claim 4 , wherein when the injection component parameter indicates the buffer, the injection address parameter comprises a page address in the buffer; and when the injection component parameter indicates the disk manager, the injection address parameter comprises a logic address in the disk manager. 6. The method according to claim 1 , further comprising: in response to an enabling request for error injection, selecting at least one stored logic error comprising the logic error from the logic error record for error injection, wherein the at least one stored logic error is stored in the logic error record according to identifiers. 7. The method according to claim 1 , wherein the injection error parameter comprises at least one of an error type and error data, and the error type indicates an error status in the at least one workflow. 8. The method according to claim 7 , further comprising: in response to data in the response to the data request being modified into the error data, verifying whether the status corresponding to data in the at least one workflow changes to a bad status. 9. The method according to claim 8 , further comprising: in response to the error type being injected into the response to the data request or the status corresponding to data in the response to the data request being changed to a bad status, starting an error processing operation, wherein the error processing operation comprises: performing the following steps in sequence until correct data is obtained: obtaining the correct data from a buffer of a backup node; obtaining the correct data from a disk manager of the backup node; and obtaining the correct data from a disk manager located at a local node; and in response to the correct data being obtained, continuing to perform the at least one workflow. 10. An electronic device, comprising: at least one processor; and a memory coupled to the at least one processor and having instructions stored thereon, wherein the instructions, when executed by the at least one processor, cause the electronic device to perform actions comprising: receiving a logic error comprising an injection address parameter and an injection error parameter; matching the injection address parameter in the logic error with a request address parameter in a response to a data request in at least one workflow; in response to that the injection address parameter is matched with the request address parameter, injecting the injection error parameter into the response to the data request; and in response to the logic error being injected into the response to the data request, update a number of times of injection corresponding to the logic error in the logic error record. 11. The electronic device according to claim 10 , wherein the response to the data request comprises a response returned from a buffer or a response returned from a disk manager. 12. The electronic device according to claim 11 , wherein the injection address parameter comprises one or both of a page address in the buffer and a logic address in the disk manager. 13. The electronic device according to claim 11 , wherein the logic error further comprises an injection component parameter, and the injection component parameter indicates that the injection address parameter corresponds to the buffer or the disk manager. 14. The electronic device according to claim 13 , wherein when the injection component parameter indicates the buffer, the injection address parameter comprises a page address in the buffer; and when the injection component parameter indicates the disk manager, the injection address parameter comprises a logic address in the disk manager. 15. The electronic device according to claim 10 , wherein the instructions, when executed by the at least one processor, further cause the electronic device to: in response to an enabling request for error injection, select at least one stored logic error comprising the logic error from the logic error record for error injection, wherein the at least one stored logic error is stored in the logic error record according to identifiers. 16. The electronic device according to claim 10 , wherein the injection error parameter comprises at least one of an error type and error data, and the error type indicates an error status in the at least one workflow. 17. The electronic device according to claim 16 , further configured to: in response to the error type being injected into the response to the data request or the status corresponding to the data in the response to the data request being changed to a bad status, start an error processing operation, wherein the error processing operation comprises: performing the following steps in sequence until correct data is obtained: obtaining the correct data from a buffer of a backup node; obtaining the correct data from a disk manager of the backup node; and obtaining the correct data from a disk manager located at a local node; and in response to the correct data being obtained, continuing to perform the at least one workflow. 18. The electronic device according to claim 16 , further configured to: in response to data in the response to the data request being modified into the error data, verifying whether the status corresponding to data in the at least one workflow changes to a bad status. 19. A computer program product having a non-transitory computer readable medium which stores a set of instructions for error injection; the set of instructions, when carried out by computerized circuitry, causing the computerized circuitry to perform a method of: receiving a logic error comprising an injection address parameter and an injection error parameter; matching the injection address parameter in the logic error with a request address parameter in a response to a data request in at least one workflow; in response to that the injection address parameter is matched with the request address parameter, injecting the injection error parameter into the response to the data request; and in response to the logic error being injected into the response to the data request, updating a number of times of injection corresponding to the logic error in a logic error record.

Assignees

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Classifications

  • G06F11/263Primary

    Generation of test inputs, e.g. test vectors, patterns or sequences {; with adaptation of the tested hardware for testability with external testers} · CPC title

  • G11C29/56Primary

    External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor · CPC title

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What does patent US12339757B2 cover?
An error injection technique involves: receiving a logic error including an injection address parameter and an injection error parameter, and matching the injection address parameter in the logic error with a request address parameter in a response to a data request in at least one workflow. The technique further involves: in a case that the injection address parameter is matched with the reque…
Who is the assignee on this patent?
Dell Products Lp
What technology area does this patent fall under?
Primary CPC classification G06F11/263. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 24 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).