Automatic device ordering

US12335228B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12335228-B2
Application numberUS-202318160517-A
CountryUS
Kind codeB2
Filing dateJan 27, 2023
Priority dateAug 5, 2020
Publication dateJun 17, 2025
Grant dateJun 17, 2025

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

For automatic device addressing, a processor configures each node device on a serial network for an order measurement. The processor further measures an order parameter for each of the node devices. The processor determines an order number of each of the node devices based on the order parameter for the node device.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus comprising: a processor; a memory storing code executable by the processor to perform: configuring each node device on a serial network for an order measurement, wherein the serial network comprises two data lines that carry data between all node devices, each of the node devices comprises a pulse circuit connected between the data lines that detects an electrical pulse generated by a pulse circuit of a master device and generates an answering pulse with a voltage generator, and configuring the node devices comprises iteratively configuring one given node device to detect the pulse and generate the answering pulse and configuring all other node devices to not detect the pulse and not generate the answering pulse; transmitting the electrical pulse over the data lines of the serial network from the master device, the data lines comprising node components that increase an electrical time-of-flight measured between node devices; receiving an answering pulse that is generated by the voltage generator of the given node device in response to detecting the electrical pulse; measuring an electrical time-of-flight time interval from transmitting the electrical pulse to receiving the answering pulse as an order parameter for each of the node devices; ranking the electrical time-of-flight time intervals for each node device from shortest to longest; and determining an order number of each of the node devices based on the electrical time-of-flight time interval ranking for the node device. 2. The apparatus of claim 1 , the processor further assigning a serial network unique device address to each of the node devices based on the order number of the node device. 3. The apparatus of claim 2 , the processor further communicating with a node device based on the device address. 4. The apparatus of claim 1 , wherein each pulse circuit comprises a pulse generator that generates the electrical pulse in response to a pulse command, a timer, and an op amp that compares a voltage between the data lines to a voltage threshold. 5. The apparatus of claim 4 , wherein the pulse command starts the timer and the voltage of the data lines exceeding the voltage threshold stops the timer to measure electrical time-of-flight time interval of the answering pulse. 6. The apparatus of claim 1 , the serial network further comprising two switched power lines and two network power lines. 7. The apparatus of claim 6 , wherein the two data lines, the two switched power lines, and the two network power lines are enclosed in a ribbon cable. 8. A method comprising: configuring, by use of a processor, each node device on a serial network for an order measurement, wherein the serial network comprises two data lines that carry data between all node devices, each of the node devices comprises a pulse circuit connected between the data lines that detects an electrical pulse generated by a pulse circuit of a master device and generates an answering pulse with a voltage generator, and configuring the node devices comprises iteratively configuring one given node device to detect the pulse and generate the answering pulse and configuring all other node devices to not detect the pulse and not generate the answering pulse; transmitting the electrical pulse over the data lines of the serial network from the master device, the data lines comprising node components that increase an electrical time-of-flight measured between node devices; receiving an answering pulse that is generated by the voltage generator of the given node device in response to detecting the electrical pulse; measuring an electrical time-of-flight time interval from transmitting the electrical pulse to receiving the answering pulse as an order parameter for each of the node devices; ranking the electrical time-of-flight time intervals for each node device from shortest to longest; and determining an order number of each of the node devices based on the electrical time-of-flight time interval ranking for the node device. 9. The method of claim 8 , the method further assigning a serial network unique device address to each of the node devices based on the order number of the node device. 10. The method of claim 9 , the method further communicating with a node device based on the device address. 11. The method of claim 8 , wherein each pulse circuit comprises a pulse generator that generates the electrical pulse in response to a pulse command, a timer, and an op amp that compares a voltage between the data lines to a voltage threshold. 12. The method of claim 11 , wherein the pulse command starts the timer and the voltage of the data lines exceeding the voltage threshold stops the timer to measure electrical time-of-flight time interval of the answering pulse. 13. The method of claim 8 , the serial network further comprising two switched power lines and two network power lines. 14. The method of claim 13 , wherein the two data lines, the two switched power lines, and the two network power lines are enclosed in a ribbon cable. 15. A computer program product comprising a non-transitory computer readable storage medium having code embodied therein, the code readable/executable by a processor to perform: configuring each node device on a serial network for an order measurement, wherein the serial network comprises two data lines that carry data between all node devices, each of the node devices comprises a pulse circuit connected between the data lines that detects an electrical pulse generated by a pulse circuit of a master device and generates an answering pulse with a voltage generator, and configuring the node devices comprises iteratively configuring one given node device to detect the pulse and generate the answering pulse and configuring all other node devices to not detect the pulse and not generate the answering pulse; transmitting the electrical pulse over the data lines of the serial network from the master device, the data lines comprising node components that increase an electrical time-of-flight measured between node devices; receiving an answering pulse that is generated by the voltage generator of the given node device in response to detecting the electrical pulse; measuring an electrical time-of-flight time interval from transmitting the electrical pulse to receiving the answering pulse as an order parameter for each of the node devices; ranking the electrical time-of-flight time intervals for each node device from shortest to longest; and determining an order number of each of the node devices based on the electrical time-of-flight time interval ranking for the node device. 16. The computer program product of claim 15 , the processor further assigning a serial network unique device address to each of the node devices based on the order number of the node device. 17. The computer program product of claim 16 , the processor further communicating with a node device based on the device address. 18. The computer program product of claim 15 , wherein each pulse circuit comprises a pulse generator that generates the electrical pulse in response to a pulse command, a timer, and an op amp that compares a voltage between the data lines to a voltage threshold. 19. The computer program product of claim 18 , wherein the pulse command starts the timer and the voltage of the data lines exceeding the voltage threshold stops the timer to measure electrical time-of-flight time interval of the answering pulse. 20. The computer program product of claim 15 , the seri

Assignees

Inventors

Classifications

  • Interconnection of computers and peripherals (printer information exchange with computer G06F3/1293) · CPC title

  • Interconnection with other networks (LAN interconnection over a bridge based backbone H04L12/462; single bridge functionality H04L12/462) · CPC title

  • with time compression of received pulses · CPC title

  • wherein the pulse-recurrence frequency is varied to provide a desired time relationship between the transmission of a pulse and the receipt of the echo of a preceding pulse · CPC title

  • Layer-2 addresses, e.g. medium access control [MAC] addresses · CPC title

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Frequently asked questions

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What does patent US12335228B2 cover?
For automatic device addressing, a processor configures each node device on a serial network for an order measurement. The processor further measures an order parameter for each of the node devices. The processor determines an order number of each of the node devices based on the order parameter for the node device.
Who is the assignee on this patent?
Rockwell Automation Tech Inc
What technology area does this patent fall under?
Primary CPC classification H04L61/5038. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 17 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).