Compensation slope adjustment in voltage converter

Patent metadata

Field	Value
Publication number	US-12334819-B2
Application number	US-202117390015-A
Country	US
Kind code	B2
Filing date	Jul 30, 2021
Priority date	Jul 30, 2021
Publication date	Jun 17, 2025
Grant date	Jun 17, 2025

Abstract

A method includes receiving a first indication of an inductor current provided by a voltage converter. The method also includes, responsive to a ratio of a rate of change of the first indication to a rate of change of a compensation ramp being greater than a threshold value, providing a second indication to the ramp generator. The compensation ramp is provided by a ramp generator to control the voltage converter. The second indication is configured to cause the ramp generator to increase an absolute value of the rate of change of the compensation ramp. The method also includes, responsive to the ratio being less than the threshold value, providing a third indication to the ramp generator. The third indication is configured to cause the ramp generator to decrease the absolute value of the rate of change of the compensation ramp.

First claim

What is claimed is:

1. An apparatus comprising:
a slope control circuit having a slope control input and a slope control output, the slope control input coupled to a current sense terminal, the slope control circuit configured to provide a control signal at the slope control output, the control signal indicative of a rate of a current sensed at the current sense terminal; and
a ramp generator having a ramp output and a ramp rate control input, the ramp rate control input coupled to the slope control output, and the ramp generator configured to set a slope of a ramp signal at the ramp output responsive to the control signal.

2. The apparatus of claim 1 , wherein the ramp generator includes a current source coupled between a voltage terminal and the ramp output and a capacitor coupled between the ramp output and a ground terminal, the current source having a control input coupled to the ramp rate control input.

3. The apparatus of claim 1 , wherein the slope control input is a first slope control input, and the slope control circuit has a second slope control input coupled to the ramp output.

4. The apparatus of claim 1 , wherein the current sense terminal is a power converter current sense terminal.

5. The apparatus of claim 2 , wherein the ramp generator is a first ramp generator, the ramp output is a first ramp output, and the current source is a first current source; and
wherein the apparatus further comprises:
a current mirror having a first current terminal and a second current terminal, the first current terminal coupled to the first current source;
a second ramp generator having a second ramp output and a ramp current input; and
a second current source coupled between the second current terminal and the ramp current input.

6. The apparatus of claim 5 , wherein the current mirror is configured to receive a first current at the first current terminal, and provide a second current at the second current terminal based on scaling up the first current with a gain.

7. The apparatus of claim 6 , wherein the slope control input is a first slope control input, the slope control circuit has a second slope control input coupled to the ramp output, and the slope control circuit is configured to:
receive a current sense signal at the first slope control input;
receive a voltage ramp signal at the second slope control input;
responsive a ratio between a slope of the current sense signal and a slope of the voltage ramp signal being above a threshold, provide a first signal at the slope control output to increase the slope of the voltage ramp signal; and
responsive to the ratio being below the threshold, provide a second signal at the slope control output to decrease the slope of the voltage ramp signal; and
wherein the gain is based on the threshold.

8. The apparatus of claim 6 , wherein the current mirror has a gain control input, and the current mirror is configured to set the gain based on a state of the gain control input.

9. The apparatus of claim 8 , further comprising a gain control circuit having a first input, a second input, and a gain control output, the first input coupled to a power converter voltage input terminal, and the second input coupled to a power converter voltage output.

10. The apparatus of claim 3 , wherein the slope control circuit includes a rate measurement circuit coupled between the slope control input and the slope control output and configured to provide the control signal, and wherein the rate measurement circuit comprises:
a timing circuit having a first timing output and a second timing output;
a first sample and hold (SH) circuit having a first data input, a first data output, and a first timing input, the first data input coupled to the first slope control input, and the first timing input coupled to the first timing output;
a second sample and hold (SH) circuit having a second data input, a second data output, and a second timing input, the second data input coupled to the first slope control input, and the second timing input coupled to the second timing output; and
an amplifier having a first amplifier input, a second amplifier input, and an amplifier output, the first amplifier input coupled to the first data output, the second amplifier input coupled to the second data output, and the amplifier output coupled to the slope control output.

11. The apparatus of claim 10 , wherein the timing circuit is configured to provide a first voltage pulse at the first timing output and a second voltage pulse at the second timing output, the second voltage pulse being separated from the first voltage pulse by an interval.

12. The apparatus of claim 10 , wherein the slope control circuit includes an integrator having a first integrator input, a second integrator input, and an integrator output, the first integrator input coupled to the amplifier output, the second integrator input coupled to the second slope control input, and the integrator output coupled to the slope control output.

13. The apparatus of claim 12 , wherein the slope control circuit further includes:
a first switch coupled between the amplifier output and the first integrator input, the first switch having a first switch control terminal;
a second switch coupled between the first and second integrator inputs, the second switch having a second switch control terminal;
a third switch coupled between the second slope control input and the second integrator input, the third switch having a third switch control terminal; and
a latch circuit having a reset input, a set input, a first latch output, and a second latch output, the set input coupled to the first timing output, the reset input coupled to the second timing output, the first latch output coupled to first switch control terminal and the third switch control terminal, and the second latch output coupled to the second switch control terminal.

14. The apparatus of claim 13 , wherein the ramp generator includes a fourth switch coupled between the ramp output and a ground terminal, the fourth switch having a fourth switch control terminal coupled to the first timing output.

15. The apparatus of claim 10 , wherein the slope control circuit includes:
a subtractor circuit having first subtractor input, a second subtractor input, and a subtractor output, the first subtractor input coupled to the amplifier output, and the second subtractor input coupled to the second slope control input; and
an accumulator circuit coupled between the subtractor output and the slope control output.

16. The apparatus of claim 15 , wherein the accumulator circuit is a digital accumulator circuit, and the slope control circuit includes an analog-to-digital converter (ADC) coupled between the subtractor output and the slope control output.

17. The apparatus of claim 5 , further comprising:
a subtractor circuit having a first subtractor input, a second subtractor input, and a subtractor output, the first subtractor input coupled to a power converter feedback input, and the second subtractor input coupled to the second ramp output;
a comparator having a first comparator input, a second comparator input, and a comparator output, the first comparator input coupled to the subtractor output, and the second comparator input coupled to the current sense terminal; and
a power stage having a power stage input and a power stage output, the power stage input coupled to the comparator output.

18. The apparatus of claim 5 , further comprising:
an adder circuit having a first adder input, a second adder input, and an adder output, the firs

Assignees

• Texas Instruments Inc

Inventors

• Chakraborty Sombuddha
• Magod Ramakrishna Raveesh

Classifications

• H03K3/037

  Bistable circuits · CPC title

• H03F3/45475

  using IC blocks as the active amplifying circuit · CPC title

• H02M1/0009

  Devices or circuits for detecting current in a converter · CPC title

• H02M1/0025

  Arrangements for modifying reference values, feedback values or error values in the control loop of a converter · CPC title

• H02M3/156 Primary

  with automatic control of output voltage or current, e.g. switching regulators · CPC title