DC-DC converter circuit and corresponding method of operation

Patent metadata

Field	Value
Publication number	US-12334817-B2
Application number	US-202318132774-A
Country	US
Kind code	B2
Filing date	Apr 10, 2023
Priority date	Apr 15, 2022
Publication date	Jun 17, 2025
Grant date	Jun 17, 2025

Abstract

In a multi-level hybrid DC-DC converter with a flying capacitor, a feedback circuit includes a first oscillator and produces a first clock signal with a frequency dependent on an output voltage. A second oscillator produces a second clock signal having a frequency dependent on a reference voltage. A logic circuit switches, as a function of the first and second clock signals, connection of the flying capacitor between one state where the flying capacitor is connected between an input node and a switching node, and another state where the capacitor is connected between the switching node and a ground node. The duty cycle of the first/second clock signal varies so that when the flying capacitor voltage is lower than a target voltage a duration of the one state is increased, and when the flying capacitor voltage is higher than the target voltage a duration of the another state is increased.

First claim

The invention claimed is:

1. A DC-DC converter circuit, comprising:
a switching stage arranged between an input node configured to receive an input voltage and a ground node configured to provide a ground voltage, the switching stage including:
a switching node selectively couplable to said input node and to said ground node, wherein the switching node is configured to be coupled to an inductor for producing an output voltage at an output node of the DC-DC converter circuit; and
a capacitor having a first terminal selectively couplable to said input node and to said switching node and a second terminal selectively couplable to said switching node and to said ground node;

a time-based feedback circuit including a first voltage-controlled oscillator, the time-based feedback circuit configured to produce a first clock signal having a frequency that is a function of said output voltage;
a second voltage-controlled oscillator configured to produce a second clock signal having a frequency that is a function of a reference voltage;
a logic circuit configured to produce, as a function of said first clock signal and said second clock signal, one or more control signals for controlling switching operation of said switching stage between:
a first operating phase wherein said capacitor is connected between said input node and said switching node;
a second operating phase wherein one of the first and second terminals of said capacitor is floating and said switching node is connected one of the input node and ground node;
a third operating phase wherein said capacitor is connected between said switching node and said ground node; and
a fourth operating phase wherein said one of the first and second terminals of said capacitor is floating and said switching node is connected said one of the input node and ground node; and

a voltage balancing circuit configured to sense a voltage across said capacitor, compare said sensed voltage to a target voltage, and produce a balancing signal indicative of a difference between said sensed voltage and said target voltage;
wherein at least one of said first voltage-controlled oscillator and said second voltage-controlled oscillator is configured to vary the duty-cycle of the first or second clock signal, respectively, as a function of said balancing signal, so that:
when said balancing signal is indicative of said sensed voltage being lower than said target voltage, a duration of said first operating phase is increased, and
when said balancing signal is indicative of said sensed voltage being higher than said target voltage, a duration of said third operating phase is increased.

2. The DC-DC converter circuit according to claim 1 , wherein said switching stage comprises:
a first high-side switch arranged between said input node and a high-side intermediate node;
a second high-side switch arranged between said high-side intermediate node and said switching node;
a first low-side switch arranged between said switching node and a low-side intermediate node; and
a second low-side switch arranged between said low-side intermediate node and said ground node; and
wherein the first terminal of said capacitor is coupled to said high-side intermediate node and the second terminal of said capacitor is coupled to said low-side intermediate node.

3. The DC-DC converter circuit according to claim 1 , further comprising a voltage divider circuit coupled to said output node of the DC-DC converter circuit and configured to produce a feedback voltage as a function of said output voltage and wherein said first voltage-controlled oscillator is configured to produce said first clock signal having a frequency that is a function of said feedback voltage.

4. The DC-DC converter circuit according to claim 1 , wherein said first voltage-controlled oscillator is configured to produce an intermediate clock signal having a frequency that is a function of said output voltage, and wherein said time-based feedback circuit configured to produce said first clock signal further includes a first delay element configured to delay said intermediate clock signal as a function of a first signal indicative of said output voltage and a second delay element configured to delay said intermediate clock signal as a function of a second signal indicative of a time derivative of said output voltage.

5. The DC-DC converter circuit according to claim 1 , wherein said logic circuit is configured to produce said one or more control signals so that said switching stage:
switches to said first operating phase in response to a rising edge detected in said second clock signal;
switches to said second operating phase in response to a rising edge detected in said first clock signal;
switches to said third operating phase in response to a falling edge detected in said second clock signal; and
switches to said fourth operating phase in response to a falling edge detected in said first clock signal.

6. The DC-DC converter circuit according to claim 1 , wherein said logic circuit is configured to produce said one or more control signals so that said switching stage:
switches to said first operating phase in response to said first clock signal being de-asserted and said second clock signal being asserted;
switches to said second operating phase in response to said first clock signal being asserted and said second clock signal being asserted;
switches to said third operating phase in response to said first clock signal being asserted and said second clock signal being de-asserted; and
switches to said fourth operating phase in response to said first clock signal being de-asserted and said second clock signal being de-asserted.

7. The DC-DC converter circuit according to claim 1 , wherein said target voltage is equal to half of said input voltage.

8. The DC-DC converter circuit according to claim 1 , wherein said voltage balancing circuit includes a transconductance amplifier circuit having a first input configured to receive said voltage sensed across said capacitor and a second input configured to receive said target voltage, and a further capacitor having a first terminal coupled to an output of said transconductance amplifier to be charged and discharged thereby, wherein said balancing signal is produced at said first terminal of said further capacitor.

9. The DC-DC converter circuit according to claim 1 , wherein said first voltage-controlled oscillator comprises:
an oscillator circuit configured to produce an oscillating signal having a frequency that is a function of the output voltage;
a delay circuit configured to produce a delayed replica of said oscillating signal, wherein an amount of delay of said delayed replica is a function of said balancing signal; and
a logic circuit configured to assert said first clock signal in response to an edge detected in said oscillating signal, and de-assert said first clock signal in response to a corresponding edge detected in said delayed replica of said oscillating signal.

10. The DC-DC converter circuit according to claim 1 , wherein said second voltage-controlled oscillator comprises:
an oscillator circuit configured to produce an oscillating signal having a frequency that is a function of the reference voltage;
a delay circuit configured to produce a delayed replica of said oscillating signal, wherein an amount of delay of said delayed replica is a function of said balancing signal; and
a logic circuit configured to assert said second clock signal in response to an edge detected in said oscillating signal, and de-assert said second clock signal in response to a corresponding edge detected in said delayed replica of said oscillating signal.

11. A met

Assignees

• St Microelectronics Srl

Inventors

• Bertolini Alessandro
• Gasparini Alessandro
• Melillo Paolo
• Levantino Salvatore
• Ghioni Massimo

Classifications

• H02M1/0003

  Details of control, feedback or regulation circuits · CPC title

• H02M1/0025

  Arrangements for modifying reference values, feedback values or error values in the control loop of a converter · CPC title

• H02M3/158

  including plural semiconductor devices as final control devices for a single load · CPC title

• H02M1/0095 Primary

  Hybrid converter topologies, e.g. NPC mixed with flying capacitor, thyristor converter mixed with MMC or charge pump mixed with buck · CPC title

• H02M1/36

  Means for starting or stopping converters · CPC title