Chip packaging structure and related inner lead bonding method

Patent metadata

Field	Value
Publication number	US-12334470-B2
Application number	US-202016916136-A
Country	US
Kind code	B2
Filing date	Jun 30, 2020
Priority date	Oct 25, 2016
Publication date	Jun 17, 2025
Grant date	Jun 17, 2025

Abstract

A chip packaging structure includes a chip and a film substrate. The chip is formed with a gold bump, and the film substrate is formed with an inner lead, wherein the gold bump includes a first bonding surface and a plurality of side walls. The gold bump is electrically connected to the inner lead through a eutectic material coverage layer, and the first bonding surface and at least one of the plurality of side walls are covered by the eutectic material coverage layer.

First claim

What is claimed is:

1. A lead bonding method for a chip packaging structure, wherein the chip packaging structure comprises a chip and a film substrate, comprising:
making a first bonding surface of a gold bump of the chip contact with a lead of the film substrate, wherein a width of the gold bump is smaller than a width of the lead, and wherein at least the first bonding surface or one of a plurality of side walls of the gold bump is a non-smooth surface;
heating the gold bump and the lead up to a temperature range to form a eutectic material coverage between the gold bump and the lead, wherein the temperature range is from 400 to 500 Celsius degrees; and
holding on for a predetermined period to make the first bonding surface and at least one of the plurality of side walls of the gold bump covered by the eutectic material coverage.

2. The lead bonding method of claim 1 , further comprising:
forming the gold bump on the chip; and
forming the lead on the film substrate.

3. The lead bonding method of claim 1 , wherein the lead and the gold bump extend along a first direction, the gold bump contacts with the lead toward a second direction, the width of the gold bump and the width of the lead are sizes along a third direction, and the first direction, the second direction and the third direction are perpendicular to one another.

4. The lead bonding method of claim 1 , wherein the lead comprises a second bonding surface, the second bonding surface faces toward the first bonding surface of the gold bump, and the eutectic material coverage covers the second bonding surface.

5. The lead bonding method of claim 4 , wherein the second bonding surface and the first bonding surface are parallel to a first plane, projections of the second bonding surface and the first bonding onto the first plane are partially or completely overlapped, the plurality of side walls is parallel to a second plane, and the first plane is perpendicular to the second plane.

6. The lead bonding method of claim 3 , wherein the second bonding surface and the first bonding surface are parallel to a first plane, the plurality of side walls is parallel to a second plane, the first plane is perpendicular to the second plane, and the plurality of side walls comprises:
a first side wall connected to the first bonding surface, perpendicular to the first bonding surface and the third direction; and
a second side wall connected to the first bonding surface, perpendicular to the first bonding surface and the third direction, and the first side wall and the second side wall are covered by the eutectic material coverage.

7. The lead bonding method of claim 6 , wherein the gold bump comprises:
a third side wall connected to the first bonding surface, the first side wall and the second side wall, perpendicular to the first bonding surface and the first direction, and covered by the eutectic material coverage.

8. The lead bonding method of claim 1 , wherein the predetermined period is from 0.1 to 2 seconds.

9. The lead bonding method of claim 1 , wherein the first bonding surface and the at least one of the plurality of side walls are covered by the eutectic material coverage by a capillary effect, and a maximum width of the gold bump is smaller than a width of the lead.

10. A chip packaging structure made by the lead bonding method of claim 1 .

Assignees

• Sitronix Technology Corp

Inventors

• Chang Ying-Chen
• Chen Po-Chi
• Tseng Kuo-Wei

Classifications

• H10W72/9415

  relative to the surface, e.g. recessed, protruding · CPC title

• H10W72/29

  Bond pads specially adapted therefor · CPC title

• H10W72/07236

  Soldering or alloying · CPC title

• H10W72/07253

  changes in shapes · CPC title

• H10W72/241

  Dispositions, e.g. layouts · CPC title