Methods for patterning a silicon oxide-silicon nitride-silicon oxide stack and structures formed by the same

US12334333B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12334333-B2
Application numberUS-202217867812-A
CountryUS
Kind codeB2
Filing dateJul 19, 2022
Priority dateDec 16, 2019
Publication dateJun 17, 2025
Grant dateJun 17, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A layer stack is formed over a conductive material portion located on a substrate. The layer stack contains a first silicon oxide layer, a silicon nitride layer formed by chemical vapor deposition, and a second silicon oxide layer. A patterned etch mask layer including an opening is formed over the layer stack. A via cavity extending through the layer stack and down to the conductive material portion is formed by isotropically etching portions of the layer stack underlying the opening in the patterned etch mask layer using an isotropic etch process. A buffered oxide etch process may be used, in which the etch rate of the silicon nitride layer is less than, but is significant enough, compared to the etch rate of the first silicon oxide layer to provide tapered straight sidewalls on the silicon nitride layer. An optical device including a patterned layer stack can be provided.

First claim

Opening claim text (preview).

What is claimed is: 1. A structure comprising: a conductive material portion located on a substrate; a layer stack including, from bottom to top, a first silicon oxide layer, a silicon nitride layer having a refractive index in a range from 1.88 to 1.95 at 632.8 nm wavelength, and a second silicon oxide layer and located over the conductive material portion; and a via cavity extending through the layer stack, wherein sidewalls of the via cavity includes first concave sidewalls of the first silicon oxide layer that are adjoined to a top surface of the conductive material portion, straight tapered sidewalls of the silicon nitride layer that are adjoined to a respective top end of the first concave sidewalls, and second concave sidewalls of the second silicon oxide layer that are adjoined to a respective top end of the straight tapered sidewalls. 2. The structure of claim 1 , wherein a width of the via cavity strictly increases with a vertical distance from a horizontal top surface of the conductive material portion. 3. The structure of claim 1 , wherein the straight tapered sidewalls of the silicon nitride layer has a taper angle in a range from 72 degrees to 85 degrees with respective to a vertical direction that is perpendicular to a top surface of the conductive material portion. 4. The structure of claim 1 , wherein: the substrate comprises a transparent dielectric material selected from fused silica, quartz, and glass; and the conductive material portion comprises a material selected from a metallic material and a transparent conductive oxide material. 5. The structure of claim 1 , wherein: the substrate has a thickness in a range from 10 microns to 3 mm; the first silicon oxide layer has a thickness in a range from 100 nm to 1,000 nm; the silicon nitride layer has a thickness in a range from 50 nm to 500 nm; and the second silicon oxide layer has a thickness in a range from 50 nm to 500 nm. 6. The structure of claim 1 , further comprising a metallic contact structure located in the via cavity on a top surface of the conductive material portion. 7. An optical structure comprising: a conductive material portion located on a substrate; a layer stack located on the conductive material portion and comprising, from one side to another, a first silicon oxide layer, a silicon nitride layer, and a second silicon oxide layer, wherein the layer stack comprises a via cavity therethrough; a metallic contact structure located within the via cavity through the layer stack, wherein sidewalls of the via cavity includes first concave sidewalls of the first silicon oxide layer that are adjoined to a top surface of the conductive material portion, straight tapered sidewalls of the silicon nitride layer that are adjoined to a respective top end of the first concave sidewalls, and second concave sidewalls of the second silicon oxide layer that are adjoined to a respective top end of the straight tapered sidewalls. 8. The optical structure of claim 7 , wherein the metallic contact structure comprises a bonding pad including an underbump metallurgy stack that contains a plurality of metal layers. 9. The optical structure of claim 8 , wherein the bonding pad comprises: a center portion contacting a top surface of the conductive material portion; and a peripheral portion adjoined to the center portion and overlying the straight tapered sidewalls of the silicon nitride layer. 10. The optical structure of claim 9 , wherein a bottom edge of a sidewall of the bonding pad is adjoined to one of the straight tapered sidewalls of the silicon nitride layer, and is laterally offset inward from the second concave sidewalls of the second silicon oxide layer. 11. The optical structure of claim 8 , wherein the metallic contact structure comprises a solder material portion that is bonded to a top surface of the bonding pad. 12. The optical structure of claim 8 , wherein: the first concave sidewalls have a first radius of curvature; the second concave sidewalls have a second radius of curvature; and the second radius of curvature is greater than the first radius of curvature. 13. The optical structure of claim 12 , wherein the first radius of curvature is the same as, or is greater than, a thickness of the first silicon oxide layer. 14. The optical structure of claim 8 , wherein a tangent of a taper angle of the straight tapered sidewalls of the silicon nitride layer, as measured from a vertical direction that is perpendicular to the top surface of the conductive material portion, is at least 3. 15. The optical structure of claim 8 , wherein the silicon nitride layer has a thickness in a range from 50 nm to 500 nm and comprises a silicon nitride material having a refractive index in a range from 1.88 to 1.95 at 632.8 nm wavelength. 16. An assembly comprising a semiconductor chip and an optical structure, wherein: the semiconductor chip comprise an optical semiconductor device; the optical structure comprises an optical filter that provides an optical transmission wavelength range; the optical structure comprises layer stack comprising, from one side to another, a first silicon oxide layer, a silicon nitride layer, and a second silicon oxide layer; the layer stack comprises a via cavity therethrough; and sidewalls of the via cavity includes first concave sidewalls of the first silicon oxide layer, straight tapered sidewalls of the silicon nitride layer that are adjoined to a respective top end of the first concave sidewalls, and second concave sidewalls of the second silicon oxide layer that are adjoined to a respective top end of the straight tapered sidewalls. 17. The assembly of claim 16 , wherein the optical structure comprises a metallic contact structure which is located within the via cavity through the layer stack and contacts the first concave sidewalls and the straight tapered sidewalls. 18. The assembly of claim 17 , wherein the optical structure comprises a conductive material portion in contact with the first silicon oxide layer and in contact with a horizontal surface of the metallic contact structure. 19. The assembly of claim 16 , further comprising an optically transparent fill material portion located between the optical semiconductor device and the optical structure. 20. The assembly of claim 16 , wherein the optical semiconductor device comprises at least one of: a complementary metal-oxide-semiconductor (CMOS) image sensor; a charge-coupled device (CCD); an optical sensor array for a light detection and ranging (LIDAR) application; and a semiconductor-based optical signal detection device.

Assignees

Inventors

Classifications

  • Etching of wafers, substrates or parts of devices · CPC title

  • the material being a silicon oxide, e.g. SiO2 · CPC title

  • using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition (deposition by physical ablation of a target H10P14/6329) · CPC title

  • the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

  • by chemical means · CPC title

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What does patent US12334333B2 cover?
A layer stack is formed over a conductive material portion located on a substrate. The layer stack contains a first silicon oxide layer, a silicon nitride layer formed by chemical vapor deposition, and a second silicon oxide layer. A patterned etch mask layer including an opening is formed over the layer stack. A via cavity extending through the layer stack and down to the conductive material p…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10P14/69433. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 17 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).