Display device and driving method

Patent metadata

Field	Value
Publication number	US-12334030-B2
Application number	US-202318294153-A
Country	US
Kind code	B2
Filing date	Feb 28, 2023
Priority date	Feb 28, 2023
Publication date	Jun 17, 2025
Grant date	Jun 17, 2025

Abstract

Embodiments of the present disclosure provide a display device and a driving method. The display device includes a display panel that includes a plurality of pixels, each of the plurality of pixels includes a pixel electrode, wherein the pixel electrode includes a plurality of pixel sub-electrodes spaced from each other; and a drive circuit configured to load a first drive voltage with different maintaining durations to at least part of a plurality of pixel sub-electrodes in a set pixel through a signal output terminal in a picture display stage, so that the set pixel is switched from a first state to a second state; wherein the set pixel is at least one of the plurality of pixels.

First claim

The invention claimed is:

1. A display device, comprising:
a display panel, comprising a plurality of pixels, wherein each of the plurality of pixels comprises a pixel electrode, and the pixel electrode comprises a plurality of pixel sub-electrodes spaced from each other; and
a drive circuit, configured to, in a picture display stage, load first drive voltages with different maintaining durations to at least part of a plurality of pixel sub-electrodes in a set pixel through a signal output terminal, to switch the set pixel from a first state to a second state; wherein the set pixel is at least one of the plurality of pixels.

2. The display device of claim 1 , wherein the drive circuit is further configured to, in the picture display stage, load first drive voltages with different maintaining durations to at least part of the plurality of pixel sub-electrodes in the set pixel through the signal output terminal when the second state is maintained.

3. The display device of claim 1 , wherein the plurality of pixel sub-electrodes of the pixel electrode are divided into a plurality of sub-electrode groups, wherein each sub-electrode group of the plurality of sub-electrode groups comprises at least one pixel sub-electrode; the pixel electrode has a symmetry axis in a column direction of pixels, and the plurality of sub-electrode groups in the pixel electrode are symmetrical about the symmetry axis; the plurality of sub-electrode groups are divided into N drive units, each of the drive units comprises two sub-electrode groups disposed symmetrically.

4. The display device of claim 3 , wherein the drive circuit is further configured to load a first drive voltage with a same maintaining duration to sub-electrode groups in a same drive unit, and load first drive voltages with different maintaining durations to sub-electrode groups in different drive units, in the set pixel.

5. The display device of claim 4 , wherein the N drive units are defined as a first drive unit to an N-th drive unit in a direction from a drive unit close to the symmetry axis to a drive unit away from the symmetry axis; and
the drive circuit is further configured to sequentially increase maintaining durations of first drive voltages loaded from the first drive unit to the N-th drive unit in the set pixel.

6. The display device of claim 3 , wherein the N drive units are defined as a first drive unit to an N-th drive unit in a direction from a drive unit close to the symmetry axis to a drive unit away from the symmetry axis; and
the drive circuit is further configured to sequentially increase maintaining durations of first drive voltages loaded from the first drive unit to the N-th drive unit in the set pixel.

7. The display device of claim 3 , wherein there are a plurality of drive circuits, wherein each column of pixels corresponds to N drive circuits of the plurality of drive circuits;
the pixel further comprises N switch control circuits; an n-th drive unit of each column of pixels is coupled to a signal output terminal of an n-th drive circuit of the N drive circuits by an n-th switch control circuit of the N switch control circuits;
the switch control circuit is configured to make a signal output terminal of a corresponding drive circuit be conductive with a corresponding drive unit under control of a signal of a scanning signal terminal.

8. The display device of claim 7 , wherein the switch control circuit comprises a conducting transistor;
a gate of the conducting transistor is coupled to the scanning signal terminal, a first electrode of the conducting transistor is coupled to the signal output terminal, and a second electrode of the conducting transistor is coupled to the drive unit.

9. The display device of claim 8 , wherein the switch control circuit comprises a capacitor;
a first electrode of the capacitor is coupled to the second electrode of the conducting transistor, and a second electrode of the capacitor is coupled to the ground terminal.

10. The display device of claim 7 , wherein the drive circuit comprises a first control sub-circuit, a second control sub-circuit and a third control sub-circuit;
the first control sub-circuit is coupled to a first node and configured to provide a signal of a first power supply terminal to the first node when a data voltage at a data input terminal is higher than a set voltage, and to provide a signal of a second power supply terminal to the first node when the data voltage at the data input terminal is lower than the set voltage;
the second control sub-circuit is coupled to a second node and configured to provide a signal of a first ramp signal terminal to the second node when the data voltage at the data input terminal is higher than the set voltage, and to provide a signal of a second ramp signal terminal to the second node when the data voltage at the data input terminal is lower than the set voltage; and
the third control sub-circuit is coupled to the first node and the second node, and is configured to output the first drive voltage to the signal output terminal according to the data voltage at the data input terminal, a voltage of a signal of the first node, and a voltage of a signal of the second node.

11. The display device of claim 10 , wherein the first control sub-circuit comprises a first transistor and a second transistor;
a gate of the first transistor is coupled to the data input terminal, a first electrode of the first transistor is coupled to the first power supply terminal, and a second electrode of the first transistor is coupled to the first node; and
a gate of the second transistor is coupled to the data input terminal, a first electrode of the second transistor is coupled to the first node, and a second electrode of the second transistor is coupled to the second power supply terminal.

12. The display device of claim 10 , wherein the second control sub-circuit comprises a third transistor and a fourth transistor;
a gate of the third transistor is coupled to the data input terminal, a first electrode of the third transistor is coupled to the first ramp signal terminal, and a second electrode of the third transistor is coupled to the second node; and
a gate of the fourth transistor is coupled to the data input terminal, a first electrode of the fourth transistor is coupled to the second node, and a second electrode of the fourth transistor is coupled to the second ramp signal terminal.

13. The display device of claim 10 , wherein the third control sub-circuit comprises a comparator;
a first input terminal of the comparator is coupled to the data signal terminal, a second input terminal of the comparator is coupled to the second node, a third input terminal of the comparator is coupled to the first node, a fourth input terminal of the comparator is coupled to a ground terminal, and an output terminal of the comparator is coupled to the signal output terminal.

14. The display device of claim 7 , wherein the display panel further comprises a plurality of scanning signal lines and a plurality of data signal lines;
a scanning signal terminal of a switch control circuit in each row of pixels is coupled to one of the plurality of scanning signal lines; and
an n-th switch control circuit in each column of pixels is coupled to a signal output terminal of an n-th drive circuit through one of the plurality of data signal lines.

15. The display device of claim 3 , wherein the pixel electrode comprises an even number of sub-electrode groups;
or the pixel electrode comprises an odd number of sub-electrode groups, wherein the pixel further comprises an (N+1)-th switch control circuit,

Assignees

• Boe Technology Group Co Ltd

Inventors

• Lu Meirong
• Liu Weixing
• Zhang Chunfang
• Teng Wanpeng
• Guo Kai
• Xu Zhiqiang
• Peng Jintao

Classifications

• G09G2320/0271

  Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title

• G09G2300/0426

  Layout of electrodes and connections · CPC title

• G02F1/1676

  Electrodes · CPC title

• G02F1/16762

  having three or more electrodes per pixel · CPC title