Display panel and display apparatus having arrangement of dam regions

Patent metadata

Field	Value
Publication number	US-12328997-B2
Application number	US-202017292754-A
Country	US
Kind code	B2
Filing date	Jul 27, 2020
Priority date	Jul 27, 2020
Publication date	Jun 10, 2025
Grant date	Jun 10, 2025

Abstract

This disclosure discloses a display panel and a display apparatus. The display panel includes: a substrate, wherein the substrate has a display region and a border region surrounding the display region; the border region includes a first power voltage line and a first planarization layer sequentially stacked on a side of the substrate; the border region has a first dam region surrounding the display region and a second dam region surrounding the first dam region; an orthographic projection of the first power voltage line on the substrate is within the first dam region; the first planarization layer is at least within the first dam region and the second dam region, and the first planarization layer within the first dam region at least covers a side surface of the first power voltage line; and the first planarization layer has a first groove and a second groove.

First claim

What is claimed is:

1. A display panel, comprising: a substrate, wherein:
the substrate has a display region and a border region surrounding the display region;
the border region comprises a first power voltage line and a first planarization layer sequentially stacked on a side of the substrate;
the border region has a first dam region surrounding the display region and a second dam region surrounding the first dam region;
an orthographic projection of the first power voltage line on the substrate is entirely within the first dam region;
at least a part of an orthographic projection of the first planarization layer on the substrate is within the first dam region and the second dam region, and a part of the first planarization layer within the first dam region at least covers a side surface of the first power voltage line; and
the first planarization layer has a first groove and a second groove, the first groove is between the first dam region and the display region, and the second groove is between the first dam region and the second dam region;
wherein an orthographic projection, on a plane perpendicular to the substrate, of a side surface of the first groove away from the display region is covered by an orthographic projection, on the plane perpendicular to the substrate, of a side surface of the first power voltage line close to the display region and an orthographic projection, on the plane perpendicular to the substrate, of an end surface of the first power voltage line in an extension direction of the first power voltage line; the first power voltage line has a stepped structure, and a stepped surface of the stepped structure is on a side, close to the display region, of the first power voltage line; and a contour of the first groove is the same as a contour of a side, adjacent to the first groove, of the first power voltage line;
wherein an orthographic projection of the second groove on the substrate does not overlap with the orthographic projection of the first power voltage line on the substrate.

2. The display panel according to claim 1 , wherein a ratio of a total width of the stepped structure in a first direction to a total height of the stepped structure in a second direction is greater than or equal to 5 and less than or equal to 10, wherein, the first direction is the extension direction of the first power voltage line, and the second direction is perpendicular to the first direction.

3. The display panel according to claim 1 , wherein:
the first planarization layer has a third groove; and
an orthographic projection of the third groove on the substrate is covered by the orthographic projection of the first power voltage line on the substrate.

4. The display panel according to claim 3 , wherein a pattern of the third groove is similar to a pattern of the first power voltage line.

5. The display panel according to claim 1 , wherein the border region further comprises:
a second power voltage line electrically connected to the first power voltage line and located between the substrate and the first power voltage line; and
a second planarization layer located between the first planarization layer and the substrate;
wherein an orthographic projection of the second planarization layer on the substrate is within the first dam region and the second dam region, and the orthographic projection of the second planarization layer on the substrate does not overlap with an orthographic projection of a top surface of the second power voltage line on the substrate and the orthographic projection of a top surface of the first power voltage line on the substrate.

6. A display apparatus, comprising a driving chip and a display panel, wherein the display panel comprises a substrate; the substrate has a display region and a border region surrounding the display region;
the border region comprises a first power voltage line and a first planarization layer sequentially stacked on a side of the substrate;
the border region has a first dam region surrounding the display region and a second dam region surrounding the first dam region;
an orthographic projection of the first power voltage line on the substrate is entirely within the first dam region;
at least a part of an orthographic projection of the first planarization layer on the substrate is within the first dam region and the second dam region, and a part of the first planarization layer within the first dam region at least covers a side surface of the first power voltage line; and
the first planarization layer has a first groove and a second groove, the first groove is between the first dam region and the display region, and the second groove is between the first dam region and the second dam region;
wherein an orthographic projection, on a plane perpendicular to the substrate, of a side surface of the first groove away from the display region is covered by an orthographic projection, on the plane perpendicular to the substrate, of a side surface, close to the display region, of the first power voltage line close to the display region and an orthographic projection, on the plane perpendicular to the substrate, of an end surface of the first power voltage line in an extension direction of the first power voltage line; the first power voltage line has a stepped structure, and a stepped surface of the stepped structure is on a side, close to the display region, of the first power voltage line; and a contour of the first groove is the same as a contour of a side, adjacent to the first groove, of the first power voltage line;
wherein an orthographic projection of the second groove on the substrate does not overlap with the orthographic projection of the first power voltage line on the substrate.

7. The display apparatus according to claim 6 , wherein:
a ratio of a total width of the stepped structure in a first direction to a total height of the stepped structure in a second direction is greater than or equal to 5, and less than or equal to 10,
wherein, the first direction is the extension direction of the first power voltage line, and
the second direction is perpendicular to the first direction.

8. The display apparatus according to claim 6 , wherein:
the first planarization layer has a third groove; and
an orthographic projection of the third groove on the substrate is covered by the orthographic projection of the first power voltage line on the substrate.

9. The display apparatus according to claim 8 , wherein a pattern of the third groove is similar to a pattern of the first power voltage line.

10. The display apparatus according to claim 6 , wherein the border region further comprises:
a second power voltage line electrically connected to the first power voltage line and located between the substrate and the first power voltage line; and
a second planarization layer located between the first planarization layer and the substrate;
wherein an orthographic projection of the second planarization layer on the substrate is within the first dam region and the second dam region, and the orthographic projection of the second planarization layer on the substrate does not overlap with an orthographic projection of a top surface of the second power voltage line on the substrate and the orthographic projection of a top surface of the first power voltage line on the substrate.

11. A display panel, comprising: a substrate, wherein:
the substrate has a display region and a border region surrounding the display region;
the border region comprises a first power voltage line and a first planarization layer sequentially stacked on a side of the substrate;
the border region has a first dam region surrounding the display region and a secon

Assignees

• Chengdu Boe Optoelect Tech Co
• Boe Technology Group Co Ltd

Inventors

• Du Sen
• Song Li
• Yu Pengfei
• Dai Jie
• Bai Lu

Classifications

• H10K59/873

  Encapsulations · CPC title

• H10K59/122

  Pixel-defining structures or layers, e.g. banks · CPC title

• H10K59/131 Primary

  Interconnections, e.g. wiring lines or terminals · CPC title